Shigeo Nagashima
Hitachi
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Publication
Featured researches published by Shigeo Nagashima.
design automation conference | 1988
Yoshio Takamine; Shunsuke Miyamoto; Shigeo Nagashima; Masayuki Miyoshi; Shun Kawabe
An advanced clock event suppression algorithm for high-speed logic simulation is described. A signal value, Cn, and a current clock (CC), which indicates the current status of clock signals, has been introduced to realize this algorithm. This algorithm suppresses about 60% of the total events, and eliminates 40% of CPU time. No overhead is needed to incorporate this algorithm using hardware support of VELVET (vectorized processing system for logic verification). Hitachis latest supercomputer S-820 has been developed using VELVET. The development period has been shortened to 3/4 that of the S-810.<<ETX>>
Archive | 1987
Koichiro Omoda; Teruo Tanaka; Junji Nakagoshi; Naoki Hamanaka; Shigeo Nagashima
Archive | 1993
Akira Muramatsu; Ikuo Yoshihara; Kazuo Nakao; Takehisa Hayashi; Teruo Tanaka; Shigeo Nagashima
Archive | 1987
Yasuhiro Inagami; Takayuki Nakagawa; Yoshiko Tamaki; Shigeo Nagashima
Archive | 1982
Shigeo Nagashima; Shunichi Torii; Koichiro Omoda; Yasuhiro Inagami
Archive | 1997
Yuji Tsushima; Yoshikazu Tanaka; Yoshiko Tamaki; Masanao Ito; Kentaro Shimada; Yonetaro Totsuka; Shigeo Nagashima
Archive | 1988
Hisashi Katada; Yasuhiro Inagami; Yoshiko Tamaki; Shigeo Nagashima
Archive | 1981
Koichiro Omoda; Shigeo Nagashima; Shunichi Torii
Archive | 1984
Yasuhiro Inagami; Shigeo Nagashima
Archive | 1986
Yasuhiro Inagami; Shigeo Nagashima; Koichiro Omoda; Takayuki Nakagawa; Teruo Tanaka
