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Dive into the research topics where Shigeru Shimada is active.

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Featured researches published by Shigeru Shimada.


international solid-state circuits conference | 2005

Low-power embedded SRAM modules with expanded margins for writing

Masanao Yamaoka; Noriaki Maeda; Yoshihiro Shinozaki; Yasuhisa Shimazaki; Koji Nii; Shigeru Shimada; Kazumasa Yanagisawa; Takayuki Kawahara

A low-power embedded SRAM module implements a writing margin expansion for low-voltage operation, a write replica circuit for low-power operation and a low-leakage structure. The replica circuit reduces active power by 18%, and a 512kB module operates at 450MHz, has 7.8 /spl mu/A leakage in standby, and a minimum V/sub DD/ of 0.8V.


international solid-state circuits conference | 2004

A 300-MHz 25-/spl mu/A/Mb-leakage on-chip SRAM module featuring process-variation immunity and low-leakage-active mode for mobile-phone application processor

Masanao Yamaoka; Yoshihiro Shinozaki; Noriaki Maeda; Yasuhisa Shimazaki; K. Kato; Shigeru Shimada; Kazumasa Yanagisawa; K. Osadal

An on-chip 1-Mb SRAM suitable for embedding in the application processor used in mobile cellular phones was developed. This SRAM supports three operating modes - high-speed active mode, low-leakage low-speed active mode, and standby mode - and uses a subdivisional power-line control (SPC) scheme. The combination of three operating modes and the SPC scheme realizes low-power operation under actual usage conditions. It operates at 300 MHz, with leakage of 25 /spl mu/A/Mb in standby mode, and 50 /spl mu/A/Mb at the low-leakage active mode. This SRAM also uses a self-bias write scheme that decreases of minimum operating voltage by about 100 mV.


IEEE Journal of Solid-state Circuits | 2006

90-nm process-variation adaptive embedded SRAM modules with power-line-floating write technique

Masanao Yamaoka; Noriaki Maeda; Yoshihiro Shinozaki; Yasuhisa Shimazaki; Koji Nii; Shigeru Shimada; Kazumasa Yanagisawa; Takayuki Kawahara

The power consumption of a low-power system-on-a-chip (SoC) has a large impact on the battery life of mobile appliances. General SoCs have large on-chip SRAMs, which consume a large proportion of the whole LSI power. To achieve a low-power SoC, we have developed embedded SRAM modules, which use some low-power SRAM techniques. One technique involves expanding the write margin; another is a power-line-floating write technique, which enables low-voltage write operation. The power-line-floating write technique makes it possible to lower the minimum operating supply voltage by 100 mV. The other techniques involve using a process-variation-adaptive write replica circuit and reducing leakage current. These techniques reduce active power during write operations by 18% and reduce active leakage of the word-line driver by 64%. The prototype SRAM modules achieve 0.8-V operation, and a 512-kb SRAM module achieves 48.4-/spl mu/A active leakage and 7.8-/spl mu/A standby leakage with worst-leakage devices.


IEEE Transactions on Electron Devices | 1980

MOS area sensor: Part II—Low-noise MOS area sensor with antiblooming photodiodes

Shinya Ohba; Masaaki Nakai; Haruhisa Ando; S. Hanamura; Shigeru Shimada; K. Satoh; Kenji Takahashi; Masaharu Kubo; T. Fujita

The development of a high-sensitivity 320 × 244 element MOS area sensor and a novel fixed pattern noise (FPN) suppressing circuit are reported in this paper. The new device incorporates p+-n+high-C photodiodes and double-diffused sense lines. The p+-n+high-Cphotodiodes provide a large dynamic range and a large saturation signal of 1.4 µA with 6-1x W-lamp illumination. The double-diffused sense lines are introduced to vastly improve blooming characteristics, making use of a built-in potential barrier. FPN is proved to stem mainly from inversion charge variations through horizontal switching MOS gate capacitances. A simple high-performance FPN suppressing circuit is proposed which realizes high signal-to-noise (S/N) ratios of more than 68 dB at saturation. The new sensor is tested in a high-sensitivity black-and-white VTR hand-held camera and will find broad applications.


Systems and Computers in Japan | 1987

A recognition algorithm of dashed and chained lines for automatic inputting of drawings

Shigeru Shimada; Shigeru Kakumoto; Masakazu Ejiri

Recognition of lines in drawings is a major task in automatic data acquisition for CAD (computer-aided design). This paper proposes an algorithm for the recognition of dashed and chained lines in graphical images. This algorithm consists of two major steps: the local recognition step which extracts local connectivity of line segments, and the global recognition step which performs route finding of connected segments based on syntax. The syntax is usually specific to each type of drawing, and is represented as rules. The performance of the proposed algorithm is demonstrated based on experiments using LSI cell drawings and topographical maps containing dashed and chained lines as graphical components.


international conference on document analysis and recognition | 1995

Agent-based parallel recognition method of contour lines

Shigeru Shimada; Kishiko Maruyama; Atsushi Matsumoto; Kazuhiro Hiraki

We propose an agent-based parallel recognition method for digitizing contour lines. In this method, we introduce two kinds of agents, a supervisor agent and vector trace agents, and compose a cooperative negotiable environment between agents to pass through irregular parts of contour lines. This method is implemented in a new man-machine oriented digitizing system, and we confirm that an operator can simultaneously select multiple contour lines and continuously recognize routes of contour lines without interruption. These properties will reduce the high cost of inputting contour drawings.


IEEE Micro | 2002

Ubiquitous spatial-information services using cell phones

Shigeru Shimada; Masaaki Tanizaki; K. Maruyarna

Conventional thinking about mobile methods for accessing the Internet is rapidly changing. The processing power of cell phones is steadily improving, and the wireless networks communication speed is increasing. Once these changes are in place, most mobile applications will give way to a third-generation (3G) cell-phone-based infrastructure. In particular, using 3G cell phones instead of conventional PCs or personal digital assistants (PDAs) will make possible ubiquitous spatial information services. These services let you use a cell phone to easily find nearby hospitals, restaurants, banks, stores, and so on. Moreover, pedestrians will be able to use cell phones to receive navigational guidance services similar to those delivered by vehicle navigation systems. In this article, we introduce real system implementations and field trials to demonstrate the potential of this integrated spatial-information services approach.


Lecture Notes in Computer Science | 1999

Geospatial Mediator Functions and Container-Based Fast Transfer Interface in Si3CO Test-Bed

Shigeru Shimada; Hiromichi Fukui

In order to improve the spatial information infrastructure in Japan, we have organized Si3CO (Spatial Information Infrastructure Interoperability Consortium), and we are newly developing a Japanese interoperable test-bed based on OGIS. In this system, we propose the new three tier model which is composed of web clients, legacy database wrappers, and GSM (Geo Spatial Mediator). Especially GSM locates between client and wrappers, and can compensate spatial objects. Moreover, we propose container-based fast transfer interface of spatial objects as for the CORBA implementation.


international conference on data engineering | 2005

Acceleration technique of snake-shaped regions retrieval method for telematics navigation service system

Masaaki Tanizaki; Kishiko Maruyama; Shigeru Shimada

Telematics services, which provide traffic information such as route guidance, congestion warnings, etc. via a wireless communication network, have spread recently. The demand is growing for graphical guide information to be provided in addition to the conventional service that provides text only guidance. To improve graphical service, we propose a new retrieval method. This method enables fast extraction of map objects within a snake-shaped region (SSR) along a driving route from a geo-spatial database that stores map data without rectangular mesh boundaries. For this retrieval method, we have considered three techniques. The first is based on simplification of the snake-shaped route region through point elimination, and the second is based on reduction of the processing load of the geometrical intersection detection processes. This second technique is accomplished by dividing the snake-shaped region into multiple cells, and the third is multiple distributions of the SSR retrieval result to terminals for quick start of navigation processing. We have developed a prototype to evaluate the performance of the proposed methods. The prototype provides route guidance information for an actual terminal, and uses information taken from United States road maps. Even in an urban area, we managed to provide an approximately 200-mile route of guide information within 10 seconds. We are convinced that the proposed method can be applied to actual telematics services.


international conference on document analysis and recognition | 1993

Paralleled automatic recognition of maps and drawings for constructing electric power distribution databases

Shigeru Shimada; Yoshinori Takahara; Hiroshi Suenaga; Kouji Tomita

An automatic maps and drawing recognition method in which recognition processes are executed in parallel is described. First, the image is divided up according to its particular features, then each layer of candidate elements is recognized under the paralleled processing environment composed of automatic recognition, and man-machine oriented semi-automatic recognition, and finally the relationships between separate elements are settled using a rule-based matching process. This method is applied to the system for constructing electric power distribution databases. This system achieves a higher processing speed with better recognition precision than conventional systems.<<ETX>>

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