Shiguo Luo

A review of distributed power systems part I: DC distributed power system

The present development state in DC distributed power systems (DPS) is comprehensively reviewed in this tutorial. Basic distributed structures and their characteristics are described. The system level design considerations are discussed. The profile of current technologies is drawn. Finally, the issues and challenges in this research area are identified. These issues include not only improving efficiency, but also increased concerns regarding the cost and complexity of power supplying systems.

Flyboost power factor correction cell and a new family of single-stage AC/DC converters

A novel power factor correction (PFC) cell, called flyboost, is presented. The proposed PFC cell combines power conversion characteristics of conventional flyback and boost converters. Based on the flyboost PFC cell, a new family of single-stage (S/sup 2/) ac/dc converters can be derived. Prominent features of newly derived S/sup 2/ converters include: three power conversions, i.e., boost, flyback, and another isolated dc/dc power conversions are simultaneously realized that typically uses only one power switch and one simple controller; part of the power delivered to the load is processed only once; bulk capacitor voltage can be clamped to the desired level; and capable of operating under continuous current mode. Experimental results on example converters verify that while still achieving high power factor and tight output regulation, the flyboost PFC cell substantially improve the efficiency of the converter.

Full bridge ZCS PWM converter for high-voltage high-power applications

This paper presents a comprehensive study of a full bridge (FB) zero-current switched (ZCS) PWM converter which is suitable for high-voltage and high-power DC application that achieves ZCS for all active switches, and zero-voltage-switched (ZVS) operation for all diodes on the high voltage side. The given converter utilizes component parasitic parameters, particularly for the high-voltage transformer, and employs fixed-frequency phase-shift control to implement soft-switching commutations. Detailed steady state analysis of the converter power stage is presented for the first time and the major features of the converters power stage are discussed. Small-signal characteristics are also presented and accompanied by a discussion of the controller design and implementation. A design example is also presented based on the steady state analysis and is validated by simulation. Theoretical and simulated results are in good agreement.

Small-signal and transient analysis of a full-bridge, zero-current-switched PWM converter using an average model

This paper presents a detailed small-signal and transient analysis of a full bridge zero-current-switched (FB-ZCS) PWM converter designed for high voltage, high power applications using an average model. The development shows the model follows directly from the converters steady-state analysis and is produced by inspection of the converters instantaneous waveforms. The method used in model development can be extended to other topologies that are not easily modeled by conventional methods. The derived model is implemented in a PSPICE subcircuit and used to produce the small-signal and transient characteristics of the converter. Results obtained in the analysis of the high voltage and high power design example are validated by comparison to the actual, switched-circuit simulations.

A bi-flyback PFC converter with low intermediate bus voltage and tight output voltage regulation for universal input applications

A single-stage bi-flyback power factor correction topology is proposed in this paper. By adding a secondary winding to BIFRED choke inductor, there are two discharging paths for the choke inductor: to load or to intermediate capacitor. In this topology, the intermediate bus voltage is limited to below 400 VDC for universal voltage applications, and DC/DC conversion cell can operate in CCM. A 150 W prototype unit based on this topology has been built and tested in the lab with experimental results that show good performance.

A review of distributed power systems. Part II. High frequency AC distributed power systems

The present development state in high frequency (HF) AC distributed power systems (DPS) is reviewed. First, background and motivations of developing HF AC-DPS are addressed. Two types of basic HF AC-DPSs based on sine wave and square/PWM (pulsewidth modulated) wave bus are described, and the system level design considerations are discussed. Further, the issues and challenges in this research area are identified. These issues include high electromagnetic interference (EMI) level, difficulty to back up power, nonredundant system structure and limited post-regulation capability, etc. Finally, a viable HF AC-DPS is proposed, which is expected to yield effective EMI trade-off and system redundancy

Modeling of conduction losses in PWM converters operating in discontinuous conduction mode

In this paper, a non-ideal PWM switch model considering conduction losses is developed. This issue was considered in the past only with the assumption that the inductor current ripple is negligible compared with its average value. Derivation of the new model is based on the energy loss invariant principle. The resulting model can be applied to simulating large inductor current ripple conditions. Accuracy of the proposed model is verified through Pspice simulation using the buck and boost converters.

New Insights on Dynamic Voltage Scaling of Multiphase Synchronous Buck Converter: A Comprehensive Design Consideration

This paper comprehensively investigates the power-related issues and introduces new control schemes in dynamic voltage scaling (DVS), which is now used in modern multi-core processor and multiprocessor system-on-chip to reduce operational voltage under light load conditions. With the aggressive motivation to boost dynamic power efficiency, the design specification of voltage transition (dv/dt) for the DVS is pushing the physical limitation of the multiphase converter design and the component stress. In this paper, the operation modes and modes transition during dynamic voltage transition are illustrated. Critical dead-times of driver IC design and system dynamics are first studied and then optimized. The excessive stress on the control MOSFET which increases the reliability concern is captured in boost mode operation. Feasible solutions are also proposed and verified by both simulation and experimental results. CdV/dt compensation for removing the adaptive voltage positioning effect and a novel nonlinear control scheme for smooth transition are proposed for dealing with fast-voltage positioning. Optimum phase number control during dynamic voltage transition is also proposed and triggered by voltage identification delta to further reduce the dynamic loss. For experimental verification, a 200 W, six-phase synchronous buck converter is implemented with the proposed schemes.

Zero-voltage-switching (ZVS) two-stage approaches with output current sharing for 48 V input DC-DC converter

Low-voltage on-board DC-DC converters are increasingly required to have high efficiency and fast transient response. In this paper, two-stage DC-DC converter architecture is proposed to achieve fast transient response while operating at high efficiencies, which feature soft switching, self-current-sharing capability and simplified self-driven techniques for the synchronous rectifiers.

Universal input single-stage PFC AC/DC converter with reduced DC-bus voltage stress

High DC bus voltage stress and low conversion efficiency limit the practical application for single stage power factor correction (PFC) AC-DC converters. This paper presents a cost-effective approach to alleviate these issues based on a conventional BIFRED AC/DC converter. In the proposed topology, a flyback transformer and a small serial connected inductor are implemented to replace the traditional input PFC inductor, and a cost-efficient lossless snubber is also proposed to reduce the turn-off spike of the main switch. The experimental results of a 20 V@4.5 A prototype indicate that the proposed technique can suppress the DC voltage below 400 V through the entire universal input range, while keeping the efficiency and power factor above 81% and 0.95 respectively.