Shinichi Tachi

Low‐temperature reactive ion etching and microwave plasma etching of silicon

A new low‐temperature reactive ion etching and microwave plasma etching method is described. Highly anisotropic silicon etching with extremely small width shifts has been performed with high selectivities of 30 for organic resist films. High etch rates of 500 and 1000 nm/min by reactive ion etching and microwave plasma etching, respectively, were achieved with a SF6 gas plasma at low wafer temperatures from −130 to −100 °C. It is concluded that lower temperatures during plasma treatment yield lower side etching and increase the dry etch resistance of organic masks.

Low‐temperature dry etching

Low‐temperature electron‐cyclotron‐resonance microwave plasma etching and reactive ion etching are described for ULSI device fabrication. Highly selective anisotropic etching at a high rate, which implies dry etching without tradeoffs, is performed without changing the discharge parameters. This etching is only achieved at reduced wafer temperatures. The etching mechanism and the model are discussed based on the etching yield results obtained by the mass‐selected reactive ion beam etching experiments. The new etching system and the etching properties obtained for the low‐temperature etching are reviewed comparing those obtained in the conventional reactive ion etching and electron‐cyclotron‐resonance microwave plasma etching.

Low-energy mass-separated ion beam deposition of materials

Abstract A low energy mass-separated ion beam deposition system was developed. Ge+ ions of 100 μA were obtained at an acceleration energy of 100 eV with a beam spot size of 5 mm o at 5 × 10−8 Torr. Material buildup has been observed at the range of ion energy where the self-sputtering yield is below unity. The incident ion energy dependence of the reactions of the F+ and CFx+ ions with a silicon substrate has been measured, as well as the physical phenomena conventionally observed between impinging ions and a substrate material. Epitaxial growth of Ge films on Ge and Si single crystal substrates has been observed at 300°C with a Ge+ ion energy of 100 eV. Deposited Ge crystal properties were evaluated.

Deposition in Dry-Etching Gas Plasmas

Polymer deposition on Si and SiO2 surfaces has been investigated in CH2F2, CHF3, CF4, and CHClF2 gas plasmas, using a microwave plasma etching system. The dependence of the deposition rate on gas pressure, RF bias power, and substrate temperature was measured at a temperature between -120°C and 150°C. The deposition rate increased with decreasing temperature in CH2F2, CHF3, and CHClF2 plasmas. The deposition of polymers occured only below -60°C in the CF4 plasma. The obtained dependence of the deposition rate on gas pressure was examined in terms of the volume of adsorbed particles. X-ray photoelectron spectroscopy measurement showed that the number of bondings between C and F atoms in deposited polymers increases with decreasing temperature and RF power, and increasing gas pressure.

Low-Temperature Microwave Plasma Etching of Crystalline Silicon

Low-temperature microwave plasma etching of crystalline silicons is described. Vertical and lateral etch rates of Si and the selectivities of Si to photoresist are measured as a function of water temperature within a range of -150 to +30° for SF6, and (3) the selectivities become high at low temperatures (e.g., >40 at -90°C and 2.3 Pa). This etching enables highly anisotropic Si etching at a high etch rate and high selectivity with fluoride gases. Less-polymerizing-type gases can provide high etch rates. An etching model of the ion-bombarded surfaces in discussed. The model implies that separate control of the side wall reaction and the horizontal surface reaction is archived by the low-temperature etching.

Chemical and Physical Roles of Individual Reactive Ions in Si Dry Etching

Chemical and physical sputtering yields of silicon by fluorocarbon ions such as F+, CF+, CF2+, CF3+ and C+ were investigated as a function of incident ion energy. Yield measurements over the 100–3000 eV incident ion energy range were performed through the use of mass-selected single species ion beam etching and in situ quartz crystal oscillator in an ultrahigh vacuum atmosphere. It was found that Si surface was fully covered with carboneous polymer and carbon in the cases of CF+ and C+ irradiation in the energy ranges of 100–700 eV and 100–2500 eV, respectively. Small quantity of carbon accumulation was also observed in the CF2+ ion beam irradiation of silicon in the 100–200 eV region, on the other hand, no carbon accumulation took place for F+ and CF3+ ion beam cases. In conventional Si dry etching by a CF4 gas plasma, since low energy (less than 1000 eV) fluorocarbon ions impinge the etched surface, it can be concluded that suppression of silicon etch rates mainly arises from the incidence of C+ and CF+ ion species.

Electrical Properties of Focused-Ion-Beam Boron-Implanted Silicon

Electrical properties of 16 keV, focused-ion-beam (FIB) (beam diameter: 1 µm, current density: 50 mA/cm2) boron-implanted silicon layers have been investigated as a function of beam scan speed and ion dose, and compared with those obtained by conventional implantation (current density: 0.4 µA/cm2). High electrical activation of the FIB implanted layers is obtained by annealing below 800°C as a result of the increase in amorphous zones created in the implanted layers. Amorphous zone overlapping is assumed to occur at FIB implantation doses of 3–4×1015 ions/cm2 from the results of electrical activation and the carrier profile of implanted regions annealed at low temperature, if beam scan speed is lowered to about 10-2 cm/s.

Two dimensionally inhomogeneous structure at gate electrode/gate insulator interface causing Fowler-Nordheim current deviation in nonvolatile memory

The gate electrode polycrystalline silicon (gate poly-Si)/gate insulator SiO/sub 2/ interface structure has been studied for obtaining reliable nonvolatile memory devices. The voltage deviation of Fowler-Nordheim tunneling current of the devices is discussed in terms of the SiO/sub 2/ surface roughness. High resolution scanning electron microscope (SEM) and atomic force microscope (AFM) measurements indicate that two dimensional nanometric oxide ridges are formed at the interface. It was found that a phosphorus dose below 2*10/sup 15/ cm/sup -2/, an annealing temperature below 900 degrees C, and the use of arsenic as a dopant resulted in the smooth SiO/sub 2/ surfaces. The reduction in the voltage deviation of the tunneling current is correspondingly obtained under these conditions. The oxide ridge growth can be explained by excess phosphorus distribution at grain boundaries and phosphorus-rich SiO/sub 2/ formation.<<ETX>>

Impact of plasma processing on integrated circuit technology migration: From 1 μm to 100 nm and beyond

Plasma processing has been a key technology for large-volume integrated circuit manufacturing for more than 30 years. In particular, various configurations of plasma reactors, along with a range of plasma chemistries, have enabled high-throughput anisotropic and selective etching of materials with attendant precision transfer of resist patterns for feature sizes from 1 μm down to 100 nm and below. This article surveys the historical developments in oxide, metal, gate, and crystalline silicon etching, along with future challenges.

NEAR-SURFACE INTERACTIONS AND THEIR ETCHING-REACTION MODEL IN METAL PLASMA-ASSISTED ETCHING

Reactive interactions in plasma etching have been investigated. Simple gas-phase transport of etchants and the reaction by-products in the wafer near-surface area are discussed. A new reincidence parameter, determined with a proposed near-surface model, was used to formulate metal etch rates. The experimental results obtained from an electron cyclotron resonance microwave plasma etching system revealed that the measured etching rate agreed well with those obtained by the near-surface model. It was found that reaction by-products repeatedly arrived at the surface depending on the reincidence numbers for the metal etching. The reincidence is the result of the diffusional transport in the vicinity of the wafer and is given by the expression {(one-half of the wafer radius)/(mean-free path)}. The ratio of the by-product flux is expressed by the product of the etching-rate flux times the reincidence number. Then, the resulting ratio of the reaction products in the flux becomes very high when we compare it to th...