Shiro Satoh
Tohoku University
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Publication
Featured researches published by Shiro Satoh.
Journal of Crystal Growth | 1985
Minoru Isshiki; T. Yoshida; T. Tomizono; Shiro Satoh; Kenzo Igaki
Abstract High purity zinc selenide single crystals have been grown using commercial high purity selenium and zinc purified by vacuum distillation and overlap zone-melting. The photoluminescence spectra measured at 4.2 K on the grown crystals are confirmed to be affected considerably by the purity of the zinc used. In the case of the purest crystal, the emission intensity related to donor bound excitons is remarkably small compared to that due to the recombination of free excitons. Moreover, no emission band is observed in the phonon energy below 2.4 eV.
international conference on micro electro mechanical systems | 2016
Shiro Satoh; Hideyuki Fukushi; Masayoshi Esashi; Shuji Tanaka
Hermetic Al-Al thermo-compression bonding was demonstrated at the lowest temperature ever reported, 370-390°C, using a thin antioxidation capping layer of Sn. A key factor of hermetic sealing is bonding pressure enough to compress the bonding interlayer metal. From the same point of view, a narrower sealing frame for stress concentration, thicker Al and a higher bonding temperature within the allowable range (<;400°C) are favorable for high yield hermetic sealing. Judging from Al-Sn phase diagram, Sn should uniformly and sparsely exist among Al grains as Al-Sn eutectic, which was also supported by the cross-sectional observation of the bonding interlayer. In such a microstructure, Al-Al direct metal bonding, which is stable at Pb-free solder reflow temperature, should be created. Al is the standard metal of CMOS backend, free from the risk of metal contamination and inexpensive, and thus the bonding technology described in this paper is useful for MEMS-CMOS integration.
Micromachines | 2018
Shiro Satoh; Hideyuki Fukushi; Masayoshi Esashi; Shuji Tanaka
Thermocompression bonding for wafer-level hermetic packaging was demonstrated at the lowest temperature of 370 to 390 °C ever reported using Al films with thin Sn capping or insertions as bonding layer. For shrinking the chip size of MEMS (micro electro mechanical systems), a smaller size of wafer-level packaging and MEMS–ASIC (application specific integrated circuit) integration are of great importance. Metal-based bonding under the temperature of CMOS (complementary metal-oxide-semiconductor) backend process is a key technology, and Al is one of the best candidates for bonding metal in terms of CMOS compatibility. In this study, after the thermocompression bonding of two substrates, the shear fracture strength of dies was measured by a bonding tester, and the shear-fractured surfaces were observed by SEM (scanning electron microscope), EDX (energy dispersive X-ray spectrometry), and a surface profiler to clarify where the shear fracture took place. We confirmed two kinds of fracture mode. One mode is Si bulk fracture mode, where the die shear strength is 41.6 to 209 MPa, proportionally depending on the area of Si fracture. The other mode is bonding interface fracture mode, where the die shear strength is 32.8 to 97.4 MPa. Regardless of the fracture modes, the minimum die shear strength is practical for wafer-level MEMS packaging.
ieee electron devices technology and manufacturing conference | 2017
Shiro Satoh; Hideyuki Fukushi; Masayoshi Esashi; Shuji Tanaka
Aluminum with Sn intermediate layer shows very large deformation even below 400°C. Using this new layer structure as sealing metal, high yield hermetic package of MEMS was demonstrated at only 370°C without any treatment of surface oxide removal. During bonding, the bonding metal is significantly pressed (the reduction rate of thickness ∼90%), which guarantees hermeticity at high yield. Based on SEM, EDX and TEM analysis, the role of tin for hermetic sealing and the mechanism of softening of this layer structure were discussed.
Lab on a Chip | 2012
Kumi Y. Inoue; Masahki Matsudaira; Reyushi Kubo; Masanori Nakano; Shinya Yoshida; Sakae Matsuzaki; Atsushi Suda; Tatsuo Kimura; Ryota Tsurumi; Toshihito Shioya; Kosuke Ino; Hitoshi Shiku; Shiro Satoh; Masayoshi Esashi; Tomokazu Matsue
Lab on a Chip | 2015
Kumi Y. Inoue; Masahki Matsudaira; Masanori Nakano; Kosuke Ino; Chika Sakamoto; Yusuke Kanno; Reyushi Kubo; Atsushi Kira; Atsushi Suda; Ryota Tsurumi; Toshihito Shioya; Shinya Yoshida; Masanori Muroyama; Tomohiro Ishikawa; Hitoshi Shiku; Shiro Satoh; Masayoshi Esashi; Tomokazu Matsue
Isij International | 1983
Minoru Isshiki; Koji Arakawa; Shiro Satoh; Mitsugu Nagano; Yasutaka Fukuda; Kazuhiro Chiba; Kenzo Igaki
Ieej Transactions on Sensors and Micromachines | 2016
Shiro Satoh; Hideyuki Fukushi; Masayoshi Esashi; Shuji Tanaka
Electronics and Communications in Japan | 2018
Shiro Satoh; Hideyuki Fukushi; Masayoshi Esashi; Shuji Tanaka
Ieej Transactions on Sensors and Micromachines | 2017
Shiro Satoh; Hideyuki Fukushi; Masayoshi Esashi; Shuji Tanaka