Shou-Hsien Weng

Design and Analysis of a DC–43.5-GHz Fully Integrated Distributed Amplifier Using GaAs HEMT–HBT Cascode Gain Stage

Design and analysis of a dc-43.5-GHz fully integrated distributed amplifier (DA) using a GaAs high electron-mobility transistor (HEMT) heterojunction bipolar transistor (HBT) cascode gain stage is presented in this paper. The proposed DA is fabricated in a stacked 2-μm InGaP/GaAs HBT, 0.5-μm AlGaAs/GaAs enhancement- and depletion-mode HEMT monolithic microwave integrated circuit technology. A modified m -derived network and an HEMT-HBT cascode amplifier with inductive peaking technique are investigated to enhance the bandwidth of the DA. The bias networks of the DA are fully integrated in a single chip without off-chip bias-T or bias components. The measured average small-signal gain is 8.5 dB. The measured minimum noise figure is 4.2 dB. The measured maximum output 1-dB compression point (P1 dB) and the maximum output third-order intercept point are 8 and 18 dBm, respectively. Moreover, the DA is successfully evaluated with an eye diagram measurement, and demonstrates good transmission quality.

A DC-21 GHz Low Imbalance Active Balun Using Darlington Cell Technique for High Speed Data Communications

A DC-21 GHz low imbalance active balun using a 2 mum InGaP/GaAs HBT process is presented in this letter for high speed data communications. A Darlington cell is adopted to enhance 3 dB bandwidth of the proposed active balun. A feedback capacitor is designed to compensate the phase error between differential output ports caused by the different number of stages. The proposed active balun achieves a broad bandwidth of 21 GHz, an average small signal gain of 2.5 dB, a maximum amplitude imbalance of 1.2 dB, and a phase error of less than 5deg. The measured group delays of the balun are lower than 30 ps with low variation. Moreover, an eye diagram with a pseudorandom bit stream of up to 12.5 Gbps is presented. The active balun is appropriate for high speed data communications due to its low imbalance and group delay.

Gain-Bandwidth Analysis of Broadband Darlington Amplifiers in HBT-HEMT Process

Broadband Darlington amplifiers using a GaAs heterojunction bipolar transistor (HBT) high electron-mobility transistor (HEMT) process are reported in this paper. The gain-bandwidth analysis of the Darlington amplifiers using HEMT-HBT, HBT-HEMT, HEMT-HEMT, and HBT-HBT configurations are presented. The bandwidth, gain, input, and output impedances are investigated with transistor size, feedback resistances, and series peaking inductance. The design methodology of the broadband Darlington amplifier in the HBT-HEMT process is successfully developed, and the direct-coupled technique is also addressed for high-speed data communications. Furthermore, two monolithic HEMT-HBT and HEMT-HEMT Darlington amplifiers are achieved from dc to millimeter wave, and successfully evaluated with a 25-Gb/s eye diagram. The HEMT-HBT Darlington amplifier demonstrates the best gain-bandwidth product with good input/output return losses among the four configurations.

Q-band low noise amplifiers using a 0.15μm MHEMT process for broadband communication and radio astronomy applications

Two Q-band low noise amplifiers using a 0.15-μm InGaAs MHEMT process for broadband communication and radio astronomy applications are presented in this paper. Between 37 and 53 GHz, the LNA1 features a small signal gain of higher than 31 dB, a noise figure of better than 3.5 dB with a minimum noise figure of 2.8 dB at 44 GHz, and a gain-bandwidth product (GBP) of 679 GHz. Between 32 and 50 GHz, the LNA2 features a small signal gain of higher than 28 dB, a noise figure of better than 3.2 dB with a minimum noise figure of 2.6 dB at 44 GHz, and a GBP of 569 GHz. The chip sizes of the LNA1 and LNA2 are both 2 x 1 mm2. The LNAs demonstrate broad bandwidth, high gain, low noise figure, and compact chip size, and they will be further applied to a few broadband receivers for communications and radio astronomy applications. Moreover, this work demonstrates the highest GBP among all the reported Q-band LNAs.

Design and Analysis of a

A Ka-band monolithic high-efficiency frequency quadrupler using a GaAs heterojunction bipolar transistor and pseudomorphic high electron-mobility transistor technology is presented in this paper. The frequency quadrupler is constructed cascading two frequency doublers. The frequency doubler employs a modified common-base/common-source topology to enhance the second harmonic efficiently. The dc bias condition, harmonic output power, conversion gain, and efficiency for variable configurations are investigated. Two phase-shifter networks are used to reduce phase error and improve the fundamental rejection. Between 23-30 GHz, the proposed frequency quadrupler features a conversion gain of higher than -1 dB with an input power of 4 dBm. The maximum conversion gain is 2.7 dB at 28 GHz with an efficiency of up to 8% and a power-added efficiency of 3.6%. The maximum output 1-dB compression point (P1 dB) and the saturation output power (Psat) are higher than 7 and 8.2 dBm, respectively. The overall chip size is 2×1 mm2.

Ka

A 30-50 GHz wide modulation bandwidth bidirectional binary phase shift keying (BPSK) demodulator/modulator using a 2 mum standard GaAs HBT process is presented in this letter. A single balanced mixer with HBT PN-junction diodes is employed in the circuit design. With a local oscillator (LO) power of 0 dBm, this letter demonstrates a maximum conversion loss of 13 dB, a modulation bandwidth of wider than 3 GHz, and a LO-to-RF isolation of better than 45 dB. The BPSK demodulation or modulation can be performed at the same input/output ports of the circuit, and therefore it can be applied to millimeter-wave (MMW) gigabit bidirectional communication systems to further reduce the complexity of the transceivers.

-Band Monolithic High-Efficiency Frequency Quadrupler Using GaAs HBT–HEMT Common-Base/Common-Source Balanced Topology

A broadband and compact inductorless active power divider is presented in this letter. By using the Darlington cell, the proposed monolithic active power divider demonstrates broad and flat bandwidth of output 1 dB compression point over the 3 dB bandwidth. The gain-bandwidth performance, input matching, and device ratio of the Darlington cell are presented to achieve broad bandwidth. The proposed active power divider exhibits a potential for the high speed transmissions due to its broad bandwidth, low amplitude/phase errors, low and flat group delay.

A 30–50 GHz Wide Modulation Bandwidth Bidirectional BPSK Demodulator/ Modulator With Low LO Power

A binary phase shift keying (BPSK) demodulator using 0.18-μm SiGe process is presented in this paper. A hybrid modified SiGe NMOS-HBT Darlington cell is proposed for the circuit design. The driving LO power is further reduced as compared to the conventional Gilbert-cell and Darlington-cell mixers. This work exhibits a broad RF bandwidth from 25 to 70 GHz with a lower driving LO power of -1 dBm, a maximum conversion gain of 0 dB, and a data rate of 1.5 Gbps. This is the first attempt to demonstrate a broadband low LO power mixer using SiGe NMOS-HBT Darlington cell for BPSK demodulation.

A Broadband Inductorless Active Power Divider for 10 Gbps High Speed Transmissions

Design of a 0.5–30 GHz Darlington amplifier using a 2 µm InGaP/GaAs HBT process for microwave broadband applications is presented in this paper. A device size ratio of the Darlington pair and a series inductor in the input are investigated to enhance the bandwidth of the Darlington pair. The proposed method is applied to the circuit design, and the bandwidth of Darlington amplifier is higher than one-thirds maximum oscillation frequency (fmax) of the device. The Darlington amplifier features a 3-dB bandwidth of from 0.5 to 29.7 GHz with an average small signal gain of 10.5 dB. This work demonstrates the highest figure of merit (FOM) among all the HBT Darlington amplifiers so far.

A 25-to-70 GHz and low LO power mixer using modified SiGe NMOS-HBT Darlington cell for Gigabit BPSK demodulation

This paper presents 24-GHz monolithic microwave integrated circuit (MMIC) development for automotive radar applications. The chipset consists of a low noise amplifier (LNA), a power amplifier (PA) and a mixer. The LNA exhibits a small signal gain of 20 dB from 19 to 32 GHz with a noise figure of 3 dB. The PA achieves a small signal gain of 20 dB from 19 to 26 GHz with an output P1dB of higher than 21 dBm. The mixer exhibits a conversion loss of 9 dB from 20 to 32 GHz with a port-to-port isolation of better than 24 dB.