Yue-Ming Hsin

A Fully SiP Integrated

In this paper, a fully system-in-package (SiP) integrated V-band Butler matrix beam-switching transmitter (TX) is presented. The CMOS chips from differential process technologies are assembled on a low-temperature co-fired ceramic (LTCC) substrate carrier by flip-chip interconnects. The vertically embedded folded monopole antenna is designed and integrated into the LTCC. The array consisting of four identical monopole antennas and a Butler matrix for beam switching is realized on the LTCC for loss reduction. Four switched main beams are measured and agree well with simulation. This beam-forming TX shows the potential of the low-cost millimeter-wave SiP with CMOS chips.

V

A compact and broadband 15 to 50 GHz resistive FET ring mixer using 0.18-µm CMOS technology is presented in this letter. This mixer exhibits a conversion loss of 13–17 dB and the port to port isolations of better than 30 dB from 15–50 GHz for both down and up-conversion with a chip size of 0.2 mm2. Besides, this mixer has an input P1dB of 4–10 dB and an IF bandwidth of 5GHz. To the authors knowledge, this is the highest frequency MMIC resistive FET ring mixer using CMOS technologies to date.

-Band Butler Matrix End-Fire Beam-Switching Transmitter Using Flip-Chip Assembled CMOS Chips on LTCC

A Ka-band monolithic high-efficiency frequency quadrupler using a GaAs heterojunction bipolar transistor and pseudomorphic high electron-mobility transistor technology is presented in this paper. The frequency quadrupler is constructed cascading two frequency doublers. The frequency doubler employs a modified common-base/common-source topology to enhance the second harmonic efficiently. The dc bias condition, harmonic output power, conversion gain, and efficiency for variable configurations are investigated. Two phase-shifter networks are used to reduce phase error and improve the fundamental rejection. Between 23-30 GHz, the proposed frequency quadrupler features a conversion gain of higher than -1 dB with an input power of 4 dBm. The maximum conversion gain is 2.7 dB at 28 GHz with an efficiency of up to 8% and a power-added efficiency of 3.6%. The maximum output 1-dB compression point (P1 dB) and the saturation output power (Psat) are higher than 7 and 8.2 dBm, respectively. The overall chip size is 2×1 mm2.

A 15–50 GHz broadband resistive FET ring mixer using 0.18-µm CMOS technology

In this paper, a 94 GHz flip-chip assembled CMOS amplifier with transition compensation is presented. Flip-chip process with a bump size (30 µm × 30 µm × 27 µm) is developed for millimeter-wave applications. Without the flip-chip transition compensation, the frequencies of the best return losses of the amplifier shifts to 82–85 GHz, which deviate from the bare die measurement results of 96 GHz. By applying the compensation network in the transition, the dips of the return loss become much closer to the bare die measurement results. To the best of our knowledge, this is the first demonstration of a CMOS amplifier with flip-chip connection in millimeter-wave frequencies.

Design and Analysis of a

A Ka-band broadband frequency doubler in a 0.18 µm SiGe BiCMOS technology is presented in this paper. The frequency doubler employs a configuration of a common-base (CB)/ common-emitter (CE) pair to enhance the second harmonic efficiently. This frequency doubler features a conversion gain of higher than ™7 dB with an input power of 5 dBm between 26 and 40 GHz. The maximum output 1-dB compression point (P1dB) is 4.3 dBm and the output saturation power (Psat) is higher than 5 dBm at 31 GHz. The overall chip size is 0.85×0.66 mm2. To the best of the authors knowledge, this work demonstrates the first SiGe-based frequency doubler using CB-CE configuration with good output power and good figure-of-merit (FOM) covering the entire Ka band.

Ka

In this study, we investigated the low-frequency noise in SiGe heterojunction bipolar transistors (HBTs) with and without a selectively implanted collector (SIC). By comparing the magnitude of 1/ f noise, collector current, and current gains of the SiGe HBTs with and without SIC, we show that the impurities at the collector produced by the incomplete activation of the implanted ions cause an increase in the collector current 1/ f noise spectrum. Thus, SiGe HBT with SIC exhibits higher collector noise current spectra due to the inactive ions in the collector. The figures-of-merit of noise corner frequency ( fC) to cutoff frequency ratio ( fT), fC/ fT, indicates that the SiGe HBT without SIC has a better low-frequency noise property for circuit application prior to the fT roll-off. Furthermore, at the onset of high injection effect, the conspicuous degradation of high-frequency properties also deteriorates the fC/ fT ratio of SiGe HBT without SIC.

-Band Monolithic High-Efficiency Frequency Quadrupler Using GaAs HBT–HEMT Common-Base/Common-Source Balanced Topology

This work investigates the temperature dependence, from 300K to 77K, of the output power, PAE, and linearity for SiGe HBTs with and without SIC. The NADC pi/4DQPSK signal is used to analyze the linearity of SiGe HBTs. For device without SIC, the heterojunction barrier effect becomes more propound, which seriously reduces the current gain and cutoff frequency at cryogenic temperatures. The output power, PAE and linearity at 2.4 GHz decrease conspicuously with decreasing operation temperatures. This barrier effect can be negligible in SiGe HBT with SIC and thus the device achieves better power and linearity performance at cryogenic temperatures