Shubhadeep Bhattacharjee

High-Performance HfO 2 Back Gated Multilayer MoS 2 Transistors

A new substrate (~30-nm HfO₂/Si) is developed for high-performance back-gated molybdenum disulfide (MoS₂) transistors. Record drain current I_ds~180 μA/μm and transconductance value g_m~75 μS/μm at V_ds = 1V have been achieved for 1-μm channel length multilayer MoS₂ transistors on HfO₂/Si substrate. The transistors on HfO₂ substrate show > 2.5× enhancement in field effect mobility (μ_FE~65 cm²/V·s) compared with the transistors on SiO₂ (μ_FE~65 cm²/V·s) substrate. The intrinsic mobility extracted from Y function technique (μ_FE~154 cm²/V·s) is 3× more than SiO₂ substrate. The drastic improvement in transistor performance is attributed to a combination of three factors: 1) efficient gate coupling with an EOT of 6.2 nm; 2) charge impurity screening due to high-k dielectric; and 3) very low contact resistance through sulfur treatment.

Surface State Engineering of Metal/MoS 2 Contacts Using Sulfur Treatment for Reduced Contact Resistance and Variability

Variability and difficulty in achieving good ohmic contacts are major bottlenecks toward the realization of high-performance molybdenum disulphide (MoS2)-based devices. The role of surface state engineering through a simple sulfur-based technique is explored to enable reliable and superior contacts with high work function (WF) metals. Sulfur-treated multilayered MoS2 FETs exhibit significant improvements in ohmic nature, nearly complete alleviation in contact variability, ~2x gain in extracted field-effect mobility, 6x and 10x drop in contact resistance, and high drain currents with Ni and Pd contacts, respectively. Raman and X-ray photoelectron spectroscopy measurements confirm lack of additional channel doping and structural changes, after sulfur treatment. From temperature-dependent measurements, the reduction of Schottky barrier height at Ni/MoS2 and Pd/MoS2 is estimated to be 81 and 135 meV, respectively, indicating the alteration of surface states at the metal/MoS2 interface with sulfur treatment. The key interface parameters, such as Fermi pinning factor, charge neutrality level, and the density of surface states, are estimated using the classical metal/semiconductor junction theory. This first report of surface state engineering in MoS2 demonstrates the ability to create excellent contacts using high WF metals, without additional channel doping, and sheds light on a relatively unexplored area of metal/transition metal dichalcogenides interfaces.

Intrinsic Limit for Contact Resistance in Exfoliated Multilayered MoS 2 FET

A new method for the separation of contact resistance (R_contact) into Schottky barrier resistance (R_SB) and interlayer resistance (R_IL) is proposed for multilayered MoS₂ FETs. While R_SB varies exponentially with Schottky barrier height (Φ_bn), R_IL essentially remains unchanged. An empirical model utilizing this dependence of R_contact versus Φ_bn is proposed and fits to the experimental data. The results, on comparison with the existing reports of lowest R_contact, suggest that the extracted R_IL(1.53 kQ · μm) for an unaltered channel would determine the lower limit of intrinsic R_contact even for barrierless contacts for multilayered exfoliated MoS₂ FETs.

A sub-thermionic MoS2 FET with tunable transport

The inability to scale supply voltage and hence reduce power consumption remains a serious challenge in modern nanotransistors. This arises primarily because the Sub-threshold Swing (SS) of the thermionic MOSFET, a measure of its switching efficiency, is restricted by the Boltzmann limit (k(B)T/q = 60 mV/dec at 300 K). Tunneling FETs, the most promising candidates to circumvent this limit, employ band-to-band tunneling, yielding very low OFF currents and steep SS but at the expense of severely degraded ON currents. In a completely different approach, by introducing concurrent tuning of thermionic and tunneling components through metal/semiconductor Schottky junctions, we achieve an amalgamation of steep SS and high ON currents in the same device. We demonstrate sub-thermionic transport sustained up to 4 decades with SSmin similar to 8.3 mV/dec and SSavg similar to 37.5(25) mV/dec for 4(3) dec in few layer MoS2 dual gated FETs (planar and CMOS compatible) using tunnel injected Schottky contacts for a highly scaled drain voltage of 10 mV, the lowest for any sub-thermionic devices. Furthermore, the same devices can be tuned to operate in the thermionic regime with a field effect mobility of similar to 84.3 cm(2) V-1 s(-1). A detailed mechanism involving the independent control of the Schottky barrier height and width through efficient device architecture and material processing elucidates the functioning of these devices. The Gate Tunable Thermionic Tunnel FET can function at a supply voltage of as low as 0.5 V, reducing power consumption dramatically. Published by AIP Publishing.

Realizing P-FETs and photodiodes on MoS 2 through area-selective p-doping via vacancy engineering

Air-stable and area-selective doping strategies have eluded 2D materials and thus been a major bottleneck in realizing the plethora of semiconductor devices which require an built in electric field accessible from a p/n junction. Here, we demonstrate the possibility of p-doping through Vacancy Engineering, which unlike previous reports of molecular/substitutional doping is both area/dopant controllable and air-stable. Through Ar⁺ ions of appropriate energy and fluence bombarded on exfoliated MoS<inf>2</inf>, we demonstrate creation of sulfur vacancies that vary the S:Mo stoichiometry from 1.94 to 0.97 and hence controllably introduce p-type doping as verified using in-situ XPS and ex-situ Raman/PL measurements. FETs fabricated on Ar⁺ bombarded flakes show complete flip in polarity of carrier type from n-type to p-type when compared to Reference samples with the same metal contacts. Furthermore, selective Ar⁺ Bombardment only on contacts region shows effective hole injection with I<inf>on</inf>/I<inf>off</inf>>10³. Finally p/n junctions with Ar⁺ bombardment performed on one half of the flake demonstrate high rectification ratio (>10⁴), forward currents (∼0.6 mA/cm²) and excellent photoresponse (I<inf>light</inf>/I<inf>dark</inf> ∼10³) and responsivity (100–400 μA/W).

Optical-Phonon-Limited High-Field Transport in Layered Materials

An optical-phonon-limited velocity model has been employed to investigate high-field transport in a selection of layered 2-D materials for both, low-power logic switches with scaled supply voltages, and high-power, high-frequency transistors. Drain currents, effective electron velocities, and intrinsic cutoff frequencies as a function of carrier density have been predicted, thus providing a benchmark for the optical-phonon-limited high-field performance limits of these materials. The optical-phonon-limited carrier velocities for a selection of multi-layers of transition metal dichalcogenides and black phosphorus are found to be modest compared to their n-channel silicon counterparts, questioning the utility of biasing these devices in the source-injection dominated regime. h-BN, at the other end of the spectrum, is shown to be a very promising material for high-frequency, high-power devices, subject to the experimental realization of high carrier densities, primarily due to its large optical-phonon energy. Experimentally extracted saturation velocities from few-layer MoS2 devices show reasonable qualitative and quantitative agreement with the predicted values. The temperature dependence of the measured vsat is discussed and compared with the theoretically predicted dependence over a range of temperatures.