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Shubhodeep Roy Choudhury

IBM

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Publication

Featured researches published by Shubhodeep Roy Choudhury.

Archive | 2007

System and method for verification of cache snoop logic and coherency between instruction & data caches for processor design verification and validation

Sampan Arora; Shubhodeep Roy Choudhury; Manoj Dusanapudi; Sunil Suresh Hatti; Shakti Kapoor; Chakrapani Rayadurgam

Archive | 2007

System and Method for Pseudo-Random Test Pattern Memory Allocation for Processor Design Verification and Validation

Shubhodeep Roy Choudhury; Sandip Bag; Manoj Dusanapudi; Sunil Suresh Hatti; Shakti Kapoor; Bhavani Shringari Nanjundiah

Archive | 2007

System and Method for Using Resource Pools and Instruction Pools for Processor Design Verification and Validation

Shubhodeep Roy Choudhury; Manoj Dusanapudi; Sunil Suresh Hatti; Shakti Kapoor; Rahul Sharad Moharil

Archive | 2007

System and Method for Re-Shuffling Test Case Instruction Orders for Processor Design Verification and Validation

Sampan Arora; Sandip Bag; Vinod Bussa; Shubhodeep Roy Choudhury; Manoj Dusanapudi; Sunil Suresh Hatti; Shakti Kapoor; Batchu Naga Venkata Satyanarayana; Shiraz Mohammad Zaman

Archive | 2007

System and Method for Creating Different Start Cache and Bus States Using Multiple Test Patterns for Processor Design Verification and Validation

Shubhodeep Roy Choudhury; Manoj Dusanapudi; Sunil Suresh Hatti; Shakti Kapoor; Chakrapani Rayadurgam; Batchu Naga Venkata Satyanarayana

Archive | 2007

System and method for generating fast instruction and data interrupts for processor design verification and validation

Shubhodeep Roy Choudhury; Manoj Dusanapudi; Sunil Suresh Hatti; Shakti Kapoor; Rahul Sharad Moharil

Archive | 2007

System and Method for Testing a Large Memory Area During Processor Design Verification and Validation

Divya S. Anvekar; Shubhodeep Roy Choudhury; Manoj Dusanapudi; Sunil Suresh Hatti; Shakti Kapoor

Archive | 2007

System and Method for Testing Multiple Processor Modes for Processor Design Verification and Validation

Sampan Arora; Shubhodeep Roy Choudhury; Manoj Dusanapudi; Sunil Suresh Hatti; Shakti Kapoor; Sai Rupak Mohanan

Archive | 2007

System and Method for Increasing Error Checking Performance by Calculating CRC Calculations After Multiple Test Patterns for Processor Design Verification and Validation

Sandip Bag; Shubhodeep Roy Choudhury; Manoj Dusanapudi; Sunil Suresh Hatti; Shakti Kapoor; Rahul Sharad Moharil

Archive | 2007

System and Method for Efficiently Handling Interrupts

Shubhodeep Roy Choudhury; Manoj Dusanapudi; Sunil Suresh Hatti; Shakti Kapoor; Rahul Sharad Moharil

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Collaboration

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Manoj Dusanapudi

IBM

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Shakti Kapoor

IBM

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Sunil Suresh Hatti

IBM

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Rahul Sharad Moharil

IBM

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Batchu Naga Venkata Satyanarayana

IBM

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Sampan Arora

IBM

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Sandip Bag

IBM

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Chakrapani Rayadurgam

IBM

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Vinod Bussa

IBM

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Bhavani Shringari Nanjundiah

IBM

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