Shukri Korakkottil Kunhi Mohd

Development of Bit-to-Chip Block for Zigbee Transmitter on FPGA

Digital transmitter was developed on FPGA (Field Programmable Gate Array) in order to meet the needs for simple, low-power and low-cost wireless communication such as Zigbee. Zigbee operates primarily in the 2.4 GHz band, which makes the technology easily applicable and worldwide available. However, this paper only covers the bit-to-symbol block and the symbol-to-chip block of the digital transmitter for an acknowledgment frame. These two blocks are combined together as bit-to-chip block before implemented on Spartan3E XC3S500E FPGA. The purpose of the research is to diversify the design methods by using the Verilog code entry through Xilinx ISE 8.2i. Here, the simulation and measurement results are also presented to verify the functionality of the combined block. The frequency for input data and output data are 250 kHz and 2 MHz respectively.

Development of the CRC block for Zigbee Standard on FPGA

CRC (Cyclic Redundancy Check) block was developed on FPGA (Field Programmable Gate Array) in order to meet the needs for simple, low-power and low-cost wireless communication such as Zigbee. Zigbee operates primarily in the 2.4 GHz band, which makes the technology easily applicable and worldwide available. This paper gives a short overview of CRC block in the digital transmitter based on Zigbee Standard. The purpose of the research is to diversify the design methods by using the Verilog code entry through Xilinx ISE 8.2i. Here, the simulation and measurement results are also presented to verify the functionality of the CRC block. The data rate of CRC block is 250 kbps.

Effect of working fluid, acceleration and heater power on temperature profile inside a thermal convective accelerometer

Convective accelerometer does not contain seismic mass and work based on free convection heat transfer of electrical heater inside a hermetic chamber. Its sensitivity is dependent to the temperature distribution of working fluid inside the hermetic chamber. In this paper, the effect of working fluid properties, acceleration and heater power on temperature profile inside the convective accelerometer hermetic chamber is presented. Convective accelerometers with various working fluids (air, carbon dioxide, water, nitrogen, argon, helium, and ethylene glycol), heater powers (0.1 to 1.0 watts), and accelerations (1 to 5 g) were simulated by using ConventorWare 2010 software. Result shows, without acceleration the temperature profile of working fluid is symmetry around the vertical axis in relation to the heat source while with acceleration, the temperature profile is slightly skewed towards the acceleration direction. Argon is the best candidate for working fluid because it produces the largest temperature difference between the left and the right sides of the heater which would result in high sensitivity accelerometer. Convective accelerometer sensitivity also can be enhanced by increasing heater power, using gas-phase working fluids and locating the temperature sensors in the range between 100 to 300 μm away from the heater.

Development of Accurate BSIM4 Noise Parameters for CMOS 0.13-µm Transistors in Below 3-GHz LNA Application

With the rapid growth of communications via the Internet, the need for an effective firewall system which has not badly affect the overall network performances has been increased. In this paper, a Field Programmable Gate Array (FPGA) -based firewall system with high performance has been implemented using Network FPGA (NetFPGA) with Xilinx Kintex-7 XC7K325T FPGA. Based on NetFPGA reference router project, a NetFPGA-based firewall system was implemented. The hardware module performs rule matching operation using content addressable memory (CAM) for higher speed data processing. To evaluate system performance, throughput, latency, and memory utilization were measured for different cases using different tools, also the number of rules that an incoming packet is subjected to was varied to get more readings using both software and hardware features. The results showed that the designed firewall system provides better performance than traditional firewalls. System throughput was doubled times of the one with Linux-Iptables firewalls.

Three-Dimensional Microwave Breast Cancer Detection System based on Bi-conical UWB Antenna Array

This paper reports investigation of modified two-dimensional (2-D) to three-dimensional (3-D) beam forming algorithm for breast cancer detection. A Graphical User Interface (GUI) based on Matrix Laboratory (MATLAB) was developed to integrate measurement task and image reconstruction, thus simplify the process. A prototype of a cylindrical radome was designed and printed using 3-D printing technology. The radome serves the purpose of holding the antenna and breast tissue-mimicking medium in position. Tumour target with few breast mimicking medium were placed in a Bi-conical Ultra-Wide Band (UWB) cylindrical antenna array arrangement. In this project, the performances of various type of medium with different algorithm were analysed. As results with breast phantom, EDAS produces 36%, 28% and 27% improvements in signal to clutter ratio as compared to DAS, DMAS and CF DAS, respectively.

A New Curvature-corrected CMOS Bandgap Voltage Reference Using Current Sink Technique

This paper presents a new CMOS Bandgap Voltage Reference (BGR). The proposed circuit consists of first-order BGR and a curvature correction circuit utilizing current sink technique to compensate for the voltage reference in a wide temperature range. With a supply voltage of 2.5 V, the simulated result shows the temperature coefficient of 2.75 ppm/°C is achieved over a temperature range of -25 ° to 140 °C. The proposed circuit is realized in Silterra 0.13 μm CMOS technology.

CMOS Voltage Controlled Oscillator (VCO) with frequency stability for extended operating temperature range

In this paper, CMOS based Voltage Controlled Oscillator (VCO) with frequency stability feature was developed. Current compensation circuit design is proposed and simulated together with VCO to produce selected output frequency at approximately 27 MHz. The design was realized using Silterra 0.18um process technology. Compensation circuit was aimed to control the current level for various temperature range. Current mirror concept was adopted in the design of the compensation circuit so that it able to produce the voltage needed to maintain constant frequency generation at -25°C until 125°C temperature range. As a result, an accuracy of 10% frequency deviation obtained.

A New Pixel Readout Circuit for X-Ray Image Sensor

A new high speed Complementary Metal Oxide Semiconductor (CMOS) pixel readout circuitry consuming a small area is proposed. The whole schematic is designed using Silterra 0.18 \(\mu \)m CMOS technology and consists of 12 small-sized MOSFETs that are one-third smaller than other solutions. The time taken to capture an image of the inner body is better than that in the literature, although the same input current is used. Simulation result shows that at the minimum input current of 3 nA, the image for the three pixels at the same row can be obtained clearly at every clock cycle.

A 0.13-µm CMOS PCSNIM LNA for Multi-Standard 0.9, 1.8, and 2.1 GHz Mobile Application

Abstract This work is on the design of a fully integrated 0.13-µm CMOS multi-standard power constrained simultaneous noise and input matching low-noise amplifier (PCSNIM LNA). The multi-standard capability is obtained via the implementation of CMOS switches. The input and output matching are fully implemented on a chip, which is uncommon when compared to the existing multi-standard LNA topologies. The multi-standard LNA is operated at 0.9, 1.8, and 2.1 GHz frequencies. The design covered wireless standards of GSM900, DCS1800, and W-CDMA applications. The multi-standard LNA can obtain noise figure as low as 1.72 dB. The third-order intercept point, IIP3, is as high as −4 dBm, while IP1dB is −10 dBm. The power consumption of the design is only 7.4 mW. This resistorless multi-standard LNA design is not just able to operate at three different frequencies but also has a comparable performance with the rest. Its merits are contributed by high linearity and low power.

Implementation of TRL (Thru-Reflect-Line) calibration kit for power amplifier measurement

The conventional Short-Open-Load-Thru (SOLT) calibration technique and measurement problem in microwave devices are investigated in this paper. Tremendous development in mobile communication increases the demand for accuracy and performance characterizations of wireless devices over a range of frequencies. Due to this fact, simplified version of calibration technique with better features is developed in order to improve the measurements accuracy. Therefore, the work carried out in this research is to implement a simplified version of Thru-Reflect-Line (TRL) calibration standard kit that matched the requirement of the Power Amplifier(PA). The proposed technique operates in the range of frequency from 2.5Ghz to 2.57GHz in order to improve the gain of the power amplifier in real measurement environment.