Sing H. Lee

Performance comparison between optoelectronic and VLSI multistage interconnection networks

The performance characteristics of optoelectronic and VLSI multistage interconnection networks are compared. The bases of the comparison include speed, bandwidth, power consumption, and footprint area. The communication network used in the comparison is a synchronous packet-switched multistage interconnection network built from 2*2 bit-serial switching elements. CMOS technology was used in the VLSI implementation, and it is assumed that the entire network resides on a single chip. Regular free-space optical interconnects are used in the optoelectronic implementation. The results show that for large networks optoelectronics offers higher speed and lower area than VLSI. Based on the assumed technology parameters, optoelectronics outperforms VLSI in bandwidth for network sizes above 256. >

Free Space Optical Interconnects For Microelectronics And Parallel Computing

Free space optical interconnections offer some beneficial solutions to microelectronic problems, e.g., pin-ins, pin-outs, testing, and wafer scale integrations. When applied to an array of multiprocessors for parallel computing, free space interconnects can offer 3-D interconnection topology, 2-D parallel data inputs and outputs and shared memory architectures. Furthermore, if the optical interconnections are programmable, we shall be able to incorporate several computational architectures efficient for implementing several computational algorithms in one machine. In this review, many of these potential benefits of utilizing free space optical interconnections will be described in detail and various research topics currently under investigation at UCSD will be discussed.

Critical issues in free space intrachip optical interconnect technology

Conditions are determined for which free space optical interconnects can transmit information at a higher data rate and consume less power than the equivalent electrical interconnections. Effects of circuit dimension scaling and improved optical link efficiency are discussed. The packing densities of optical and electrical interconnects are also compared.

Design Of Computer Generated Holograms For A Shared Memory Network

An optical interconnect system employing Computer Generated Holograms (CGHs) for a shared memory computer is described. The CGHs serve three functions: the concentration of light onto the communication modulators, implementation of butterfly connections between processing elements and memory modules, and provision of optical system output signals. Binary phase CGH components have been designed to provide these functions for a prototype shared memory computer. It is shown that system requirements can be met with the use of a lensless double pass holographic system and an iterative CGH encoding method. This encoding method is an extension of the Iterative Discrete On-axis encoding method to the Fresnel diffraction regime. The computer run time of this algorithm can be significantly reduced by setting the initial CGH transmittance equal to an approximation of the final pattern.

2-D Silicon/PLZT Spatial Light Modulators: System Application Potential

This paper presents a description and design considerations for silicon/PLZT spatial light modulators (Si/PLZT SLMs) which provide high parallel processing power, dynamic range, cellular resolution, sensitivity and the potential for implementation of smart optical devices. Following an overview of Si/PLZT SLMs, we discuss potential performance with respect to fundamental limits. Finally, we predict performance in specific applications. This analysis suggests that Si/PLZT SLMs can play an important role in the implementation of a variety of optical processing and computing systems.

Justifications For A Hybrid Approach To Optical Computing

A hybrid approach to optical computing is currently studied at the University of California, San Diego for performing parallel processing. Figure 1 shows a promising parallel processing architecture, in which an optical processing array is connected massively in parallel to an optical memory array. An optical processing array consists of an array of electronic logic gates; each cell in the array has at least one photodetector (or phototransistor) and one modulator for optical input/output. Similarly, an optical memory array consists of an array of electronic memory circuits; each cell in the array has also optical input/output. Within the optical processing array or the optical memory array, local interconnections among neighboring cells can be established electronically. Between the optical processing array and the optical memory array, global interconnections among distant cells can be established optically using the optical input/output in each cell. One important application of such a massively interconnected architecture would be to perform matrix-tensor multiplications (Ref. 1) not only for numeric computing, but also for artificial intelligence and neural computing (Ref. 2). There are three unique aspects associated with the parallel architecture of Figure 1, which may serve to justify this hybrid approach toward optical computing: optical interconnection, 3-D computational topology and optical memory.

2-d silicon/plzt spatial light modulators: Technology

This paper presents a description and design considerations for silicon/PLZT Spatial Light Modulators (Si/PLZT SLMs) which provide high parallel processing power, dynamic range, cellular resolution, sensitivity and the potential for implementation of smart optical devices. Following an overview of Si/PLZT SLMs, we discuss two current technologies related to the development of these devices to meet the highest performance goals. Finally, we predict performance in specific applications.

Architectures And Algorithms For Digital Optical Computing Systems With Applications To Numerical Transforms And Partial Differential Equations

The potential and promise of very high-performance spatial light modulators (SLMs) capable of performing logic operations has motivated the investigation of digital computing systems that possess many desirable attributes of optical systems, namely massive parallelism, global communication at high bandwidths, high reliability, many useful degrees of freedom, robustness in the presence of defects, and simplicity. The parallelism of easily realizable optical single-instruction, multiple-data (SIMD) arrays makes them a natural choice for implementation of highly structured algorithms for the numerical solution of multi-dimensional partial differential equations and the computation of fast numerical transforms. A system comprising several SLMs, an optical read/write memory, and a functional block to perform simple, space-invariant shifts on images has enough flexibility to implement the fastest known methods for partial differential equations (e.g. multi-level methods) as well as a wide variety of numerical transforms (e.g., FFT, Walsh-Hadamard transform, rapid transform), in two or more dimensions, and using either fixed or floating-point arithmetic. Performance is projected at greater than 109 floating-point operations/s using SLMs with resolution 1000 x 1000 operating at 1 MHz frame rates.