Sona Carpenter

A Highly Integrated Chipset for 40 Gbps Wireless D-Band Communication Based on a 250 nm InP DHBT Technology

A highly integrated chipset comprising a transmitter (TX) and a receiver (RX) chip, based on a 250 nm InP DHBT technology for high data rate D-band (110-170 GHz) wireless communication is described. The chipset is designed for point-to-point wireless communication for 4G and 5G mobile communication infrastructure, high data rate backhaul, low-latency wireless HDTV transmission and >40 Gbps transmission over dielectric waveguide. The measured RX conversion gain is 26 dB, with a noise figure of 9 dB. The measured TX conversion gain is 20 dB. A maximum QPSK data rate of 44 Gbps is demonstrated, which exceeds the present state-of-the art in the D-band by a factor of 2.

A

This paper presents design and characterization of single-chip 110-170-GHz ( D-band) direct conversion in-phase/quadrature-phase (I/Q) transmitter (TX) and receiver (RX) monolithic microwave integrated circuits (MMICs), realized in a 250-nm indium phosphide (InP) double heterojunction bipolar transistor (DHBT) technology. The chipset is suitable for low-power ultrahigh-speed wireless communication and can be used in both homodyne and heterodyne architectures. The TX consists of an I/Q modulator, a frequency tripler, and a broadband three-stage power amplifier. It has single sideband (SSB) conversion gain of 25 dB and saturated output power of 9 dBm. The RX includes an I/Q demodulator with D-band amplifier and ×3 multiplier chain at the LO port. The RX provides a conversion gain of 26 dB and has noise figure of 9 dB. A 48-Gbit/s direct quadrature phase-shift keying (QPSK) data transmission using a 144-GHz millimeter-wave carrier signal is demonstrated with a bit error rate (BER) of 2.3 × 10 -3 and energy efficiency of 7.44 pJ/bit. An 18-Gbit/s 64-quadrature amplitude modulation (QAM) signal was transmitted in heterodyne mode with measured TX-to-RX error vector magnitude (EVM) of less than 6.8% and spectrum efficiency of 3.6 bit/s/Hz. The TX and RX have dc power consumption of 165 and 192 mW, respectively. The chip area of each TX and RX circuit is 1.3 × 0.9 mm2.

D

This paper presents design and characterization of D-band (110-170 GHz) monolithic microwave integrated quadrature up- and down-converting mixer circuits with on-chip RF and local oscillator (LO) baluns. The circuits are fabricated in 250-nm indium-phosphide double heterojunction bipolar transistor technology. The mixers require an external LO signal and can be used as direct carrier quadrature modulator and demodulator to implement higher order quadrature amplitude modulation formats. The up-converter has a single-sideband (SSB) conversion gain of 6 dB with image and LO suppression of 32 and 27 dBc, respectively. The chip can provide maximum output RF power of 2.5 dBm, a third-order output intercept point of 4 dBm, and consumes 78-mW dc power. The down-converter exhibits 14-dB SSB conversion gain with 25-dB image rejection ratio, and 11.5-dB SSB noise figure. The chip consumes 74-mW dc power and can deliver maximum output IF power of 4 dBm. Both chips have the same size with active area of 560 μm × 440 μm including the RF and LO baluns.

-Band 48-Gbit/s 64-QAM/QPSK Direct-Conversion I/Q Transceiver Chipset

This paper presents the design and characterization of a D-band (110–170 GHz) monolithic microwave integrated direct carrier quadrature modulator and demodulator circuits with on-chip quadrature local oscillator (LO) phase shifter and radio frequency (RF) balun fabricated in a 130 nm SiGe BiCMOS process with ft/fmax of 250 GHz/400 GHz. These circuits are suitable for low-power ultra-high-speed wireless communication and can be used in both homodyne and heterodyne architectures. In single-sideband operation, the modulator demonstrates a maximum conversion gain of 9.8 dB with 3-dB RF bandwidth of 33 GHz (from 119 GHz to 152 GHz). The measured image rejection ratio (IRR) and LO suppression are 19 dB and 31 dB, respectively. The output P1dB is −4 dBm at 140 GHz RF and 1 GHz intermediate frequency (IF) and the chip consumes 53 mW dc power. The demodulator, characterized as an image reject mixer, exhibits 10 dB conversion gain with 23-dB IRR. The measured 3-dB RF bandwidth is 36 GHz and the IF bandwidth is 18 GHz. The active area of both the chips is 620 µm × 480 µm including the RF and LO baluns. A 12-Gbit/s QPSK data transmission using 131-GHz carrier signal is demonstrated on modulator with measured modulator-to-receiver error vector magnitude of 21%.

Fully Integrated D-Band Direct Carrier Quadrature (I/Q) Modulator and Demodulator Circuits in InP DHBT Technology

A single-chip active frequency tripler circuit with output at F-band (90–140 GHz) is presented. A common-emitter transistor stage with input and output matching circuits is used to produce the third harmonic, followed by a five-pole band-pass filter and a wideband four-stage power amplifier to amplify and increase the output power. The circuit is implemented in a 250-nm InP double-heterostructure bipolar transistor technology with ft/fmax 350/650 GHz, respectively. The chip achieves a peak output power of 14.2 dBm from 99 to 126 GHz at 2-dBm input power and conversion gain of 13 dB at −2-dBm input power. The measured 3-dB output bandwidth is 51 GHz from 90 to 141 GHz which corresponds to 44.2% relative bandwidth. It demonstrates up to 23-dBc rejection ratio of the first and the second harmonics. The dc power consumption is 156 mW at 2-dBm input power. The chip size is

Multi-functional D-band I/Q modulator/demodulator MMICs in SiGe BiCMOS technology

0.9 \times 0.96\,\,\text {mm}^{{2}}

A +14.2 dBm, 90–140 GHz Wideband Frequency Tripler in 250-nm InP DHBT Technology

including pads and achieves a power efficiency of 16.7%.

A G-Band (140–220 GHz) planar stubbed branch-line balun in BCB technology

A G-Band planar stubbed branch-line balun is designed and fabricated in 3μm thick BCB technology. This topology of the balun does not need thru-substrate via hole or thin-film resistor which makes it extremely suitable for realization on single-layer high-resistivity substrates commonly used at millimeter-wave or post-processed BCB layers on top of standard semi-insulating wafers. The design is simulated and validated by measurements. Measurement results on two fabricated back-to-back baluns show better than 10 dB input and output return loss and 3.2 dB insertion loss from 140 to 220 GHz.