Zhongxia Simon He

Development of a Time Domain Microwave System for Medical Diagnostics

In this paper, a time-domain system dedicated to medical diagnostics has been designed, a prototype has been built and its performance has been evaluated. Measurements show that the system has a 3-dB bandwith of about 3.5 GHz and a signal to noise ratio over 40 dB in the frequency range about 800 MHz to 3.8 GHz. The system has been used to perform a microwave tomographic image reconstruction test. The same target was reconstructed based on data measured with a network analyzer. A comparison between the images shows very small differences, and proves the functionality of the time domain system.

Graphene FET Gigabit ON–OFF Keying Demodulator at 96 GHz

We demonstrate the demodulation of a multi-Gb/s ON-OFF keying (OOK) signal on a 96 GHz carrier by utilizing a 250-nm graphene field-effect transistor as a zero bias power detector. From the eye diagram, we can conclude that the devices can demodulate the OOK signals up to 4 Gb/s.

A Novel FPGA-Based 2.5Gbps D-QPSK Modem for High Capacity Microwave Radios

A novel FPGA-based Differential QPSK modem (modulator and demodulator) is presented for data rates up to 2.5Gbps, in which no DAC or ADC is used. The targeted application is E-Band microwave Point-to-Point radio links in mobile backhaul for LTE and beyond.

A

This paper presents design and characterization of single-chip 110-170-GHz ( D-band) direct conversion in-phase/quadrature-phase (I/Q) transmitter (TX) and receiver (RX) monolithic microwave integrated circuits (MMICs), realized in a 250-nm indium phosphide (InP) double heterojunction bipolar transistor (DHBT) technology. The chipset is suitable for low-power ultrahigh-speed wireless communication and can be used in both homodyne and heterodyne architectures. The TX consists of an I/Q modulator, a frequency tripler, and a broadband three-stage power amplifier. It has single sideband (SSB) conversion gain of 25 dB and saturated output power of 9 dBm. The RX includes an I/Q demodulator with D-band amplifier and ×3 multiplier chain at the LO port. The RX provides a conversion gain of 26 dB and has noise figure of 9 dB. A 48-Gbit/s direct quadrature phase-shift keying (QPSK) data transmission using a 144-GHz millimeter-wave carrier signal is demonstrated with a bit error rate (BER) of 2.3 × 10 -3 and energy efficiency of 7.44 pJ/bit. An 18-Gbit/s 64-quadrature amplitude modulation (QAM) signal was transmitted in heterodyne mode with measured TX-to-RX error vector magnitude (EVM) of less than 6.8% and spectrum efficiency of 3.6 bit/s/Hz. The TX and RX have dc power consumption of 165 and 192 mW, respectively. The chip area of each TX and RX circuit is 1.3 × 0.9 mm2.

D

A proof of concept on-/off- keying (OOK) modulator is designed and implemented in a commercial heterojunction bipolar transistors IC process. The modulator circuit consists of an amplifier/latch structure, which is used as an OOK modulator for the first time. One of its advantages is that the topology may be implemented in both field effect transistor and bipolar technology. The measurement results correspond well with simulation and show that the modulator is capable of handling carrier frequencies up to 28 GHz, and data rates up to 14 Gbps. The isolation of the modulator in the off-state is better than 27 dB over the whole frequency range.

-Band 48-Gbit/s 64-QAM/QPSK Direct-Conversion I/Q Transceiver Chipset

Datacenters demand higher speed vertical cavity surface emitting laser (VCSEL) based optical interconnects at low-power consumption. As a potential technology enabler, this paper presents a wide-bandwidth and energy-efficient multilevel pulse-amplitude-modulation (PAM) VCSEL driver implemented in an InP 0.25 μm double-heterojunction bipolar transistor (DHBT) technology. The operational bandwidth of the driver is verified and error-free electrical data transmission up to 56 Gbps PAM-2 and 100 Gbps PAM-4 is demonstrated at a driver energy consumption less than 2 pJ/bit. The driver is integrated and tested with an in-house fabricated 850 nm VCSEL. Error-free 56 Gbps PAM-4 optical transmission at a transmitter energy consumption of 3.7 pJ/bit is demonstrated without equalization. This is the highest data rate reported for an integrated PAM-4 modulated VCSEL transmitter, while being the most energy efficient above 40 Gbps operation. Moreover, the VCSEL driver offers a pre-emphasis feature at PAM-2 operation for improved link throughput and receiver sensitivity.

A 14 Gbps On-/Off- Keying Modulator in GaAs HBT Technology

In this paper we present a 60 GHz 2 × 2 MIMO demonstrator which has been developed to accomplish robust line-of-sight as well as non-line-of-sight indoor transmission. The physical layer concept is based on Code-Spread Orthogonal Frequency Division Multiplexing (CS-OFDM) and Alamouti Space-Time Coding (STC) to make maximum use of both frequency and space diversity. The highly modular, reconfigurable hardware implementation comprises commercial FPGA platforms and self-developed extension modules up to fully integrated TX/RX 60 GHz frontends in III-V technology. We present results of transmission experiments conducted in a small office environment, which exemplary illustrate the capabilities and the performance of the presented approach.

An Energy Efficient 56 Gbps PAM-4 VCSEL Transmitter Enabled by a 100 Gbps Driver in 0.25 μm InP DHBT Technology

In recent years, the demand for high data rate wireless communications has increased dramatically, which requires larger bandwidth to sustain multi-user accessibility and quality of services. This can be achieved at millimeter wave frequencies. Graphene is a promising material for the development of millimeter-wave electronics because of its outstanding electron transport properties. Up to now, due to the lack of high quality material and process technology, the operating frequency of demonstrated circuits has been far below the potential of graphene. Here, we present monolithic integrated circuits based on epitaxial graphene operating at unprecedented high frequencies (80–100u2009GHz). The demonstrated circuits are capable of encoding/decoding of multi-gigabit-per-second information into/from the amplitude or phase of the carrier signal. The developed fabrication process is scalable to large wafer sizes.

An NLOS-capable 60 GHz MIMO demonstrator: System concept & performance

For dense small cell deployment in centralized baseband architecture, wireless fronthaul is a cost efficient and flexible alternative to fiber-based fronthaul links. Due to the available wide bandwidth, millimeter-wave technology is the most promising choice to realize multi-gigabit wireless transmission of the common public radio interface (CPRI). In this paper, we present a novel differential encoding scheme for differential quadrature phase-shift keying (D-QPSK) modulation, which enables data-rate adaptable CPRI transmission without modification of a standard receiver. A multi-rate D-QPSK modulator/demodulator (modem) is implemented and tested for data rates up to 10 Gbps, limited by the bandwidth of the microwave components in use. This modem is verified to fulfill the CPRI specifications with respect to multi-rate, low latency and high system performance. Therefore, it is proposed for the implementation of wireless CPRI links at millimeter-wave bands.

Wafer scale millimeter-wave integrated circuits based on epitaxial graphene in high data rate communication

This paper presents the design and characterization of a D-band (110–170 GHz) monolithic microwave integrated direct carrier quadrature modulator and demodulator circuits with on-chip quadrature local oscillator (LO) phase shifter and radio frequency (RF) balun fabricated in a 130 nm SiGe BiCMOS process with ft/fmax of 250 GHz/400 GHz. These circuits are suitable for low-power ultra-high-speed wireless communication and can be used in both homodyne and heterodyne architectures. In single-sideband operation, the modulator demonstrates a maximum conversion gain of 9.8 dB with 3-dB RF bandwidth of 33 GHz (from 119 GHz to 152 GHz). The measured image rejection ratio (IRR) and LO suppression are 19 dB and 31 dB, respectively. The output P1dB is −4 dBm at 140 GHz RF and 1 GHz intermediate frequency (IF) and the chip consumes 53 mW dc power. The demodulator, characterized as an image reject mixer, exhibits 10 dB conversion gain with 23-dB IRR. The measured 3-dB RF bandwidth is 36 GHz and the IF bandwidth is 18 GHz. The active area of both the chips is 620 µm × 480 µm including the RF and LO baluns. A 12-Gbit/s QPSK data transmission using 131-GHz carrier signal is demonstrated on modulator with measured modulator-to-receiver error vector magnitude of 21%.