Soon-Yen Jung

Improvement of Thermal Stability of Ni Germanide Using a Ni–Pt(1%) Alloy on Ge-on-Si Substrate for Nanoscale Ge MOSFETs

In this paper, thermally stable Ni germanide using a Ni-Pt(1%) alloy and TiN capping layer is proposed for high-performance Ge MOSFETs. The proposed Ni-Pt(1%) alloy structure exhibits low-temperature germanidation with a wide temperature window for rapid thermal processing. Moreover, sheet resistance is stable and the germanide interface shows less agglomeration despite high-temperature postgermanidation anneal up to 550 °C for 30 min. In addition, the surface of the Ni-Pt(1%) alloy structure is smoother than that of a pure Ni structure both before and after the postgermanidation anneal. Only the NiGe phase and no other phases such as PtxGey and NixPt1-xGey can be observed in X-ray diffraction results, but X-ray photoelectron spectroscopy shows that PtGe is formed during the postgermanidation anneal. The larger Pt atomic radius is believed to inhibit the diffusion of Ni into the Si substrate, thereby improving the thermal stability of the NiGe. The higher melting point of PtGe is also believed to improve thermal stability. Therefore, this proposed Ni-Pt(1%) alloy could be promising for high-mobility Ge MOSFET applications.

Ni Germanide Utilizing Ytterbium Interlayer for High-Performance Ge MOSFETs

In this article, ytterbium (Yb) incorporation into NiGe is proposed to improve the thermal stability of Ni germanide for high-performance Ge metal-oxide-semiconductor field-effect transistors (Ge MOSFETs). The Yb/Ni/TiN structure shows suppression of NiGe agglomeration and better surface morphology than the Ni/TiN structure after a postgermanidation annealing of up to 550°C for 30 min. It is notable that Yb atoms distribute uniformly at the top region of NiGe. NiGe agglomeration was retarded by Yb incorporation, and the thermal stability of NiGe was therefore improved.

Thermal Immune Ni Germanide for High Performance Ge MOSFETs on Ge -on- Si Substrate Utilizing

Highly thermally stable Ni germanide technology for high performance germanium metal-oxide-semiconductor field-effect transistors (Ge MOSFETs) is proposed, utilizing Pd incorporation into Ni germanide. The proposed Ni germanide shows not only the improvement of thermal stability but also the reduction of hole barrier height, which can improve the device on-current by reducing the Ni germanide to p+ source/drain contact resistance. The proposed Ni germanide showed a stable sheet resistance of up to 500degC 30-min postgermanidation annealing due to the suppression of agglomeration and oxidation of Ni germanide and the diffusion of Ni and Ge atoms by the incorporated Pd. Therefore, the proposed Ni0.95Pd0.05 alloy could be promising for the high mobility Ge MOSFET applications.

\hbox{Ni}_{0.95}\hbox{Pd}_{0.05}

In this article, incorporating ytterbium into Ni-silicide using an Yb interlayer is proposed to reduce the work function of Ni-silicide for a Ni-silicided Schottky barrier diode. The proposed Ni-silicide exhibited good Schottky barrier diode characteristics owing to the reduced work function of about 0.15−0.38 eV. Even though the ytterbium layer was deposited below nickel, a ternary phase (YbxNi1−x)Si is formed at the top region of the Ni-silicide, which is believed to reduce the work function.

Alloy

Characterized herein is a different physical mechanism for the formation of Ni silicide by incorporating rare earth (RE) metals such as ytterbium (Yb), erbium (Er), and dysprosium (Dy). Although the incorporation of any RE metal increases the Schottky barrier height (SBH) for holes in Ni silicide due to the formation of a ternary phase silicide, Yb induced the greatest increase in SBH because, unlike the other metals, Yb atoms accumulated at the silicide/silicon interface.

Work function variation of nickel silicide using an ytterbium buffer layer for Schottky barrier metal-oxide-semiconductor field-effect transistors

In this paper, thermally stable Ni-germanosilicide technology utilizing Ni-Pd alloy and Co/TiN capping layer (Ni-Pd/Co/TiN tri-layer) is proposed for high performance strained-Si CMOS technology. The proposed Ni-germanosilicide technology exhibits low temperature silicidation with a wide temperature window for rapid thermal process (RTP). Moreover, sheet resistance shows stable characteristics in spite of the high temperature postsilicidation annealing up to 700 for 30 min. In addition, the surface of Ni-Pd/Co/TiN structure is much smoother than that of Ni/Co/TiN structure for both before and after the postsilicidation annealing. Therefore, the Ni-germanosilicide using the Ni-Pd/Co/TiN tri-layer is highly promising for future SiGe based nanoscale CMOS technology.

Influence of Incorporating Rare Earth Metals on the Schottky Barrier Height of Ni Silicide

The thermal stability of nickel silicide (NiSi) on a silicon-on-insulator (SOI) substrate after postsilicidation annealing (550–700 °C) is discussed in this paper. Nickel silicide technology, used for nanoscale complementary metal oxide semiconductor (CMOS) field-effect transistor (FET) devices, has a fundamental problem of thermal stability. Three different Pd concentrations in Ni–Pd alloy, 1, 5, and 10 at. %, were used to study the thermal stability of nickel silicide formed by a silicidation process. The Ni–Pd (10%) sample showed good thermal stability upon annealing at temperatures up to 700 °C for 30 min. Only a low-resistivity mononickel silicide (NiSi) phase peak was observed by X-ray diffraction (XRD) measurement, which was confirmed by Auger electron spectroscopy (AES) analysis. Uniformly formed nickel silicide with a good interface profile was obtained using the Ni–Pd (10%) sample according to field-emission scanning electron microscopy (FE-SEM) measurement. However, the Ni–Pd (5%) sample produced high-resistivity nickel disilicide (NiSi2) after annealing at 650 °C for 30 min. Four different layer structures, Ni, Ni/TiN, Ni/Co/TiN, and Ni–Pd (10%)/Co/TiN, were also used for further study. Among these structures, the Ni–Pd (10%)/Co/TiN layer structure had good thermal stability upon annealing at temperatures up to 700 °C, while the other structures deteriorated due to agglomeration above 550 °C.

Thermal Stability Improvement of Ni–Germano silicide Utilizing Ni–Pd Alloy for Nanoscale CMOS Technology

The effects of a strained silicon layer on the thermal stability of nickel (germano)silicide for nanoscale complementary metal oxide semiconductor field-effect transistor (CMOSFET) devices are discussed in this study. Three different thicknesses, 5, 13, and 40 nm, of silicon layers on silicon germanium (SiGe) were prepared for this experiment. The effects of the silicidation rapid thermal annealing (RTA) temperature and postsilicidation annealing temperature for the different silicon layer thicknesses were studied. For comparison, a bulk silicon substrate and a SiGe substrate were also used. Silicides with the thin strained silicon layers (5 and 13 nm) on SiGe showed good thermal stability in this study. However, the other silicides using bulk silicon, 40-nm-thick silicon on SiGe, and the SiGe substrate underwent degradation due to silicide agglomeration during annealing. A SiO2 layer was found on the silicide using the SiGe substrate. In this study, several analysis methods such as four-point probe measurement, field-emission scanning electron microscopy (FE-SEM), atomic force microscopy (AFM), and Auger electron spectroscopy (AES) were used for detailed study.

Study of Nickel Silicide Thermal Stability Using Silicon-on-Insulator Substrate for Nanoscale Complementary Metal Oxide Semiconductor Field-Effect Transisor Device

【In this paper, thermal stability of Nickel silicide formed on p-type silicon wafer using Ni-V alloy film was studied. As compared with pure Ni, Ni-V shows better thermal stability. The addition of Vanadium suppresses the phase transition of NiSi to

Effects of Strained Silicon Layer on Nickel (Germano)silicide for Nanoscale Complementary Metal Oxide Semiconductor Field-Effect Transistor Device

NiSi_2