Sotoju Asai

A 1" format 1.5 M pixel IT-CCD image sensor for an HDTV camera system

A 1-in. format 1.5-million pixel IT (interline transfer) CCD (charge coupled device) image sensor has been developed for an HDTV (high-definition television) camera system. To achieve a low smear ratio while maintaining a high level of sensitivity, the authors have developed a new impurity profile of a buried P/sup +/-layer and an on chip microlens array whose material is a deep-UV resist. Using this sensor, a high-fidelity picture with a horizontal resolution of 820 TV lines has been obtained. The IT-CCD sensor has achieved a smear ratio of less than -90 dB, a sensitivity level of 80 nA/Lx, and a maximum charge handling capacity of 1.2*10/sup 5/ electrons. >

An 0.8-/spl mu/m high-voltage IC using a newly designed 600-V lateral p-channel dual-action device on SOI

A novel lateral power device, termed a p-channel dual-action device (p-ch DAD), is proposed and experimentally demonstrated in action. This device is based on a new dual-action mechanism. The new device has successfully increased on-state current without lowering the device breakdown voltage. The 600-V level-shifting action of the p-ch DAD has been confirmed by a circuit experiment. A newly designed p-ch DAD on the silicon on insulator can be made by adding four additional masks and trench technology to a 0.8-/spl mu/m CMOS process. Moreover, the process we have developed is completely compatible with an existing 5-V 0.8-/spl mu/m CMOS process.

Expression of worst case using multivariate analysis in MOSFET model parameters

Device and circuit performance such as drain current and delay time varies stochastically due to uncontrollable factors in the fabrication processes. In this paper, a new method that represents the variation of the performance as worst case parameters in a MOSFET model is proposed. The variation of the performance can be expressed as a linear combination of several process-related parameters of the MOSFET model. Because of this fact, the worst case of parameters which corresponds to the worst case of performance can be directly and uniformly determined. Therefore, the calculation time of worst case parameters can be reduced by this method. The worst case parameter sets calculated by this method enable designers to estimate circuit performance variations accurately and easily. The capability of this method is verified in the variation analysis of drain current.