Spenser Gilliland

Wireless sensor network for structural health monitoring using System-on-Chip with Android smartphone

Critical structures such as aircrafts, bridges, dams and buildings require periodic inspections to ensure safe operation. Reliable inspection of structures can be achieved by combining ultrasound non-destructive testing techniques with other sensors (for example, temperature sensor and accelerometers). In this study, we show that adapting wireless embedded systems to the task of structural health monitoring improves inspection productivity, increases mobility, and allows the aggregation of critical data to enhance inspection accuracy. To achieve this objective, we developed a customized system based on Reconfigurable Ultrasonic System-on-chip Hardware (RUSH) platform. RUSH collects and analyzes ultrasonic data to detect structural flaws such as cracks, voids, or fatigue. The collected data is then transferred through a Bluetooth transceiver to an Android smartphone referred to as Mobile Sensor Data Collector (MSDC), where the data is instantly displayed and forwarded to a central server for expert review over the Internet.

3D ultrasonic signal compression algorithms for high signal fidelity

Ultrasonic signal processing applications require huge amounts of data to be processed. Further, high computational performance is essential to meet the real-time requirements. Compression of the signal helps to reduce the data size and storage requirements as well as allow for rapid transmission of data to remote locations. High signal fidelity is significant in many of practical applications like ultrasound medical imaging and nondestructive testing. In this study, we discuss two methods for ultrasonic signal compression which offer high signal fidelity - Discrete Wavelet Transform and signal decimation with the Nyquist rate limit. The compression algorithm is implemented on a reconfigurable system-on-chip platform using programmable hardware logic as well as in software using an embedded processor. The implementation details and the performance of the compression algorithms on both the hardware and software are analyzed in this paper.

Performance evaluation of FPGA based embedded ARM processor for ultrasonic imaging

This study evaluates the performance of an FPGA based embedded ARM processor system to implement signal processing for ultrasonic imaging and nondestructive testing applications. FPGA based embedded processors possess many advantages including a reduced overall development time, increased performance, and the ability to perform hardware-software (HW/SW) co-design. This study examines the execution performance of split spectrum processing, chirplet signal decomposition, Wigner-Ville distributions and short time Fourier transform implementations, on two embedded processing platforms: a Xilinx Virtex-5 FPGA with embedded MicroBlaze processor and a Xilinx Zynq FPGA with embedded ARM processor. Overall, the Xilinx Zynq FPGA significantly outperforms the Virtex-5 based system in software applications.

Multidimensional representation of ultrasonic data processed by Reconfigurable Ultrasonic System-on-Chip using OpenCL high-level synthesis

Ultrasonic non-destructive testing has been widely used to determine the properties of materials, and more importantly their integrity. However, these techniques often require capturing massive amounts of data and intensive signal processing for processes such as image formation, analysis, characterization, classification and diagnosis. Our study is focused around utilizing a Reconfigurable Ultrasonic System-on-Chip Hardware (RUSH) platform to process ultrasonic signals in real-time. To this end, OpenCL has been utilized in the RUSH platform to provide a means to accelerate computation using the FPGA fabric while providing consistent memory and execution models to enable portability. To visualize the ultrasound data, a Graphical User Interface (GUI) for the Analysis of Multidimensional Ultrasonic data on RUSH (GAMUR) has been incorporated. GAMUR utilizes C++/QT and OpenGL to enable enhanced visualization and control features within the RUSH platform. The interface not only features the ability to view the ultrasound signals in one dimension, two dimensions, or three dimensions; but also to command and configure the hardware accelerators built using OpenCL. Therefore, the system provides a means for analyzing, visualizing and accelerating the extraction of information from multi-dimensional ultrasound data.

Mobile ultrasonic signal processing system using Android smartphone

This study introduces a mobile ultrasonic signal processing (MUSP) system using an Android smartphone for remote ultrasonic testing and imaging applications. The Android smartphone has multiple wireless data communication options such as Bluetooth, Wi-Fi and cellular data networks. The smartphone receives the ultrasonic data using the Bluetooth connection from a data acquisition and communication unit (DACU). With the help of Android Native Development Kit (NDK) libraries, we developed two signal processing algorithms in C programming language which are processed by the Android smartphone to explore the smartphone computing capability for ultrasonic testing applications. Split Spectrum Processing (SSP) and Chirplet Signal Decomposition (CSD) algorithms are considered for benchmarking and signal analysis. The analyzed data is displayed in real-time on the smartphone screen and streamed to a central location via Wi-Fi or cellular data networks for storage and further data analysis. A Java programmed server application is implemented to communicate with the Android application over the Internet in order to display and save the retrieved signal data. This system brings the ability to analyze ultrasonic signals remotely and to transfer ultrasound data from one end to the other for extensive signal ultrasonic imaging at a central location. The accessibility of the ultrasonic data at the central location allows experts to review ultrasonic information and make decision about the state of the health of structures and critical components under test.

Linux based reconfigurable platform for high speed ultrasonic imaging

In this paper, we present a Reconfigurable Ultrasonic System-on-Chip Hardware (RUSH) platform for real-time signal analysis and image processing. The platform is designed to directly process the full range of ultrasound from 20 KHz to 20 MHz. The project aims to make it simple to effectively develop and implement algorithms in embedded software and reconfigurable hardware. This provides the user with an opportunity to explore the full design space including software only, hardware only, and hardware/software co-design. The RUSH platform provides high speed access to a 12-bit ADC controlled by a Xilinx FPGA. Access to the ultrasound data and custom IP cores is available through a gigabit Ethernet connection managed by an embedded Linux based operating system running on a Microblaze processor instantiated in the FPGA fabric.

Architecture of the reconfigurable ultrasonic system-on-chip hardware platform

Design of ultrasonic signal processing systems requires a paradigm shift to fully utilise the benefits of recent advancements in the field of integrated circuits. It is necessary to design a standardised common platform that provides the flexibility to develop both software and hardware solutions. This enables the user to explore the full design space including software only, hardware only, and hardware/software co-design. To fulfil this purpose, the authors introduce the reconfigurable ultrasonic system-on-chip hardware (RUSH) platform. RUSH provides a common basis which significantly reduces the effort required to develop an ultrasonic signal processing system able to process the full range of ultrasound from 20 kHz to 20 MHz. Furthermore, this study aims to make the design and implementation of signal processing algorithms in embedded software and reconfigurable hardware very efficient. To demonstrate the computational efficiency and design flexibility of the RUSH platform, several important computationally intense algorithms such as split spectrum processing, chirplet signal decomposition and coherent averaging have been successfully ported to the RUSH platform, emphasising the many parts of the RUSH architecture.

Reconfigurable Ultrasonic System-on-Chip Hardware (RUSH) platform for real-time ultrasonic imaging applications

Ultrasonic systems are widely used in industrial and medical imaging applications for diagnosis, nondestructive evaluation (NDE), defect recognition and classification. These applications require large amounts of data to be processed in realtime using computationally-intensive signal processing algorithms. In this study, we developed a Reconfigurable Ultrasonic System-on-Chip Hardware (RUSH) platform. This platform provides real-time signal processing for NDE and imaging applications using ultrasonic transducers ranging from 20 KHz to 20 MHz operational frequencies.

Implementation of elementary functions for FPGA compute accelerators

Field programmable gate arrays (FPGA) are growing from the role of glue logic into the area of application acceleration and compute. This is fostered by advances in silicon technologies as well as standards based methodologies for interacting with heterogeneous compute resources. As these standards generally require the implementation of elementary functions, this work outlines the implementation and evaluation of the elementary functions required by the heterogeneous programming standard OpenCL. It outlines the implementation of the math “builtin” functions using CORDIC methods and details the processes that will be taken to benchmark the resource usage, maximum frequency, and latency of each function on Xilinx 7 Series FPGAs. Because of the applicability and standardization of the OpenCL math functions, this benchmarking effort provides a basis for understanding and analysing future implementations.

Remotely accessible computer network laboratory with hands-on experience

This paper presents the design and evaluation of a remotely accessible and platform-independent computer network laboratory. We have integrated two network standards namely IPKVM and VLAN to create a flexible and expandable laboratory system for remote students. Students located at remote sites were able to seamlessly conduct hands-on experiments and collaborate with their classmates. A survey was conducted among the students who enrolled in the “Introduction to Computer Networks laboratory” course at Illinois Institute of Technology. The results show that students can complete the lab experiments efficiently, and the remote framework does not impose any barrier in conducting experiments and consequently does not degrade the quality of their education. The system developed in our institution can be used for other laboratory courses such as computer networking security and system administration.