Srinjoy Mitra

Real-Time Classification of Complex Patterns Using Spike-Based Learning in Neuromorphic VLSI

Real-time classification of patterns of spike trains is a difficult computational problem that both natural and artificial networks of spiking neurons are confronted with. The solution to this problem not only could contribute to understanding the fundamental mechanisms of computation used in the biological brain, but could also lead to efficient hardware implementations of a wide range of applications ranging from autonomous sensory-motor systems to brain-machine interfaces. Here we demonstrate real-time classification of complex patterns of mean firing rates, using a VLSI network of spiking neurons and dynamic synapses which implement a robust spike-driven plasticity mechanism. The learning rule implemented is a supervised one: a teacher signal provides the output neuron with an extra input spike-train during training, in parallel to the spike-trains that represent the input pattern. The teacher signal simply indicates if the neuron should respond to the input pattern with a high rate or with a low one. The learning mechanism modifies the synaptic weights only as long as the current generated by all the stimulated plastic synapses does not match the output desired by the teacher, as in the perceptron learning rule. We describe the implementation of this learning mechanism and present experimental data that demonstrate how the VLSI neural network can learn to classify patterns of neural activities, also in the case in which they are highly correlated.

An implantable 455-active-electrode 52-channel CMOS neural probe

Several studies have demonstrated that understanding certain brain functions can only be achieved by simultaneously monitoring the electrical activity of many individual neurons in multiple brain areas [1]. Therefore, the main tradeoff in neural probe design is between minimizing the probe dimensions and achieving high spatial resolution using large arrays of small recording sites. Current state-of-the-art solutions are limited in the amount of simultaneous readout channels [2], contain a small number of electrodes [2,3] or use hybrid implementations to increase the number of readout channels [3,4].

An Efficient and Compact Compressed Sensing Microsystem for Implantable Neural Recordings

Multi-Electrode Arrays (MEA) have been widely used in neuroscience experiments. However, the reduction of their wireless transmission power consumption remains a major challenge. To resolve this challenge, an efficient on-chip signal compression method is essential. In this paper, we first introduce a signal-dependent Compressed Sensing (CS) approach that outperforms previous works in terms of compression rate and reconstruction quality. Using a publicly available database, our simulation results show that the proposed system is able to achieve a signal compression rate of 8 to 16 while guaranteeing almost perfect spike classification rate. Finally, we demonstrate power consumption measurements and area estimation of a test structure implemented using TSMC 0.18 μm process. We estimate the proposed system would occupy an area of around 200 μm ×300 μm per recording channel, and consumes 0.27 μW operating at 20 KHz .

A Wearable 8-Channel Active-Electrode EEG/ETI Acquisition System for Body Area Networks

This paper describes an 8-channel gel-free EEG/electrode-tissue impedance (ETI) acquisition system, consisting of nine active electrodes (AEs) and one back-end (BE) analog signal processor. The AEs amplify the weak EEG signals, while their low output impedance suppresses cable-motion artifacts and 50/60 Hz mains interference. A common-mode feed-forward (CMFF) scheme boosts the CMRR of the AE pairs by 25 dB. The BE post-processes and digitizes the analog outputs of the AEs, it also can configure them via a single-wire pulse width modulation (PWM) protocol. Together, the AEs and BE are capable of recording 8-channel EEG and ETI signals. With EEG recording enabled, ETIs of up to 60 kΩ can be measured, which increases to 550 kΩ when EEG recording is disabled. Each EEG channel has a 1.2 GΩ input impedance (at 20 Hz), 1.75 μVrms (0.5-100 Hz) input-referred noise, 84 dB CMRR and ±250 mV electrode offset rejection capability. The EEG acquisition system was implemented in a standard 0.18 μm CMOS process, and dissipates less than 700 μW from a 1.8 V supply.

An ultra low power current-mode filter for neuromorphic systems and biomedical signal processing

Current-mode log-domain CMOS filters have favorable properties, such as wide dynamic range at low supply voltage, compactness, linearity and low power consumption. These properties are becoming increasingly important for biomedical applications that require extremely low-power dissipation and neuromorphic circuits that attempt to reproduce the biophysics of biological neurons and synapses. We present a current-mode log-domain integrator circuit with tunable gain that is extremely compact, compared to analogous state-of-the-art solutions. We show how the circuit proposed can implement a wide range of cut-off frequencies, extending over four orders of magnitude and dissipates less than 1 nW for cutoff frequencies lower than 100 Hz.We derive the circuitpsilas linear and non-linear characteristics through analytical derivations, present SPICE simulations that are in accordance with the theoretical analysis, and show measurements from a test chip comprising the VLSI implementation of the circuit proposed.

A VLSI spike-driven dynamic synapse which learns only when necessary

We describe an analog VLSI circuit implementing spike-driven synaptic plasticity, embedded in a network of integrate-and-fire neurons. This biologically inspired synapse is highly effective in learning to classify complex stimuli in semi-supervised fashion. The circuits presented are designed in sub-threshold CMOS consuming extremely low power. The pulse-based neural network communicates with the outside world using the address event representation in an asynchronous fashion. We present measurements from a test chip, characterizing all the modules of the circuit and show how they match well with theoretical expectations. We finally demonstrate that the learning mechanism of the synapse is fully functional by stimulating it with Poisson distributed spike trains

A 20µW intra-cardiac signal-processing IC with 82dB bio-impedance measurement dynamic range and analog feature extraction for ventricular fibrillation detection

The accurate recognition of multiple intra-cardiac signals is becoming more and more important for Cardiac Resynchronization Therapy (CRT) and for the analysis of the intra-thoracic fluid status [1, 2]. Robust and accurate Heart-Rate (HR) monitoring at the right/left ventricles and the right atrium is essential for an implantable cardiac pacemaker system (Fig. 16.9.1), and ultra-low power consumption is needed. In addition, an accurate motion sensor and thoracic impedance measurement can acquire valuable additional information in clinical research on the intra-cardiac rhythm analysis. As shown in Fig. 16.9.2, our proposed Analog Signal Processor (ASP) IC consists of 3 power-efficient intra-cardiac signal readout channels. Each channel is equipped with a low-power QRS feature extraction unit and an ECG processor in parallel. The ASP also provides an ultra-low-power readout circuit for an external accelerometer (RA). In addition, two quadrature bio-impedance readout channels are used together with a digitized sinusoidal current generator in order to implement an accurate and wide dynamic range bio-impedance measurement. The ASP improves the state of the art by integrating a power-efficient means of QRS feature extraction for detecting Ventricular Fibrillation (VF), and a wide dynamic range bio-impedance readout.

A 700µW 8-channel EEG/contact-impedance acquisition system for dry-electrodes

A 700μW 8-channel active-electrode (AE) based EEG monitoring system is presented. The complete system consists of 9 AEs and a back-end analog signal processor. It is capable of continuously recording EEG signals and electrode-tissue contact impedance (ETI). The EEG channels have 1.2GΩ input impedance, 1.75μVrms noise (0.5-100Hz), 84dB CMRR, and can reject ±250mV of electrode offset, while consuming less than <;87μW (including ETI measurement). The system facilitates ambulatory use and patient comfort, while delivering high quality EEG signals.

A Low-power and Compact-sized Wearable Bio-impedance Monitor with Wireless Connectivity

In this paper, we present a new bio-impedance monitor for wearable and continuous monitoring applications. The system consumes less than 14.4mW when measuring impedance, and 0.9mW when idling. Its compact size (4.8cm × 3cm × 2cm) makes it suitable for portable and wearable use. The proposed system has an accuracy of 0.5Ω and resolution of 0.2Ω on both resistance (R) and reactance (X) measurements, for impedance ranging between (j0.7)Ω to (54+j5)Ω with 2.9<<5.7. We also report the results of the system validation using passive loads as human tissue model, and show our wireless and miniaturized bio-impedance monitoring system has comparable performances with a reference system.

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A low-power analog signal processing IC is presented for the low-power heart rhythm analysis. The ASIC features 3 identical, but independent intra-ECG readout channels each equipping an analog QRS feature extractor for low-power consumption and fast diagnosis of the fatal case. A 16-level digitized sine-wave synthesizer together with a synchronous readout circuit can measure bio-impedance in the range of 0.1-4.4 kΩ with 33 mΩrms resolution and higher than 97% accuracy. The proposed 25 mm2 ASIC consumes only 13 μA from 2.2 V. It is a highly integrated solution offering all the functionality of acquiring multiple high quality intra-cardiac signals, requiring only a few limited numbers of external passives.