Stuart K. Tewksbury

Communication network issues and high-density interconnects in large-scale distributed computing systems

The authors discuss the impact of the physical interconnection environment through which the concurrent processes among locally distinct computing nodes of large-scale multicomputer systems are coupled. The communication capabilities implied for massively parallel computing systems by fine-grain task partitioning and by fine-grained communications are discussed in detail. Wafer-scale and hybrid wafer-scale system technologies which would support such communications are described. >

Advanced interconnection technologies and system-level communications functions

Drawing on advanced packaging and interconnection schemes along with advances in VLSI technologies, the authors consider some examples of novel interconnection technologies. Novel polymer waveguides requiring only exposure to deep UV to fabricate a waveguide are emphasized as a potentially important material compatible with overlaying complex VLSI circuitry. Superconducting microstrip interconnections are considered. These examples suggest that conventional VLSI silicon technologies will evolve to become the support for the selective introduction of advanced interconnection technologies, yielding within the smaller system volumes of wafer-level systems the heterogeneous mixture of technologies seen in, or being introduced into, conventional, complex systems. It is pointed out that the specific examples used are microfabricated structures on substrates appropriate for achieving narrow features.<<ETX>>

The impact of high-T/sub c/ superconductivity on system communications

Reviews simple models for understanding the intrinsic behavior of superconducting striplines for frequencies much less than the gap frequency omega /sub g/, and low reduced temperatures. The effects of extrinsic factors such as nonideal stripline geometries and dielectrics are also examined. It is concluded that although based upon classical theory, these models are useful in providing performance estimates so that preliminary observations can be made regarding the application of high-T/sub c/ superconducting lines within digital computer systems. Finally, possible applications as well as performance questions regarding the use of high-T/sub c/ superconductors within contemporary and future digital systems are discussed. >

Wafer-level optical interconnection network layout

Two important issues will greatly influence the success of mapping optical interconnections into future waferlevel distributed computing systems: (1), the scalability of active optical devices with cointegration along side ULSI components, and (2), the scalability of optical networks and components to the wafer level. If these criteria can be met, planar integrated and free-space optics can potentially provide a very high performance communication network within the multi-wafer environment. With the predominantly planar geometry and processing of waferlevel circuits, process compatible integrated planar optical interconnections are especially attractive for providing network passive connectivity. As with their electrical counterparts, spatial, as well as time division multiplexing of optical interconnections is desirable, given that layout and area constraints are not too severe. Therefore here, emphasis is shifted away from the individual behavior of traditional long distance lightwave single mode waveguides towards the collective system behaviour (i.e. density, coupling, layout, etc.) of large dense arrays of multimode optical waveguides. In this paper, initial experimental optical coupling results are presented for arrays of multimode polysilyne polymer waveguides, both for straight configurations and for arrays with radial right angle bend layouts.

Future Physical Environments and Concurrent Computation

Using graph-based representations of computation problems [1]–[3], the communication function of a “pseudo-general purpose,” massively parallel computing environment is discussed to help define technology-focussed realizations of that communication function. Compatible computation problems are neither constrained to highly regular structures (such as systolic arrays and their generalizations [4]) nor extended to the globally non-deterministic behavior of many general purpose problems [5]. A fully distributed [6], data driven [7] computing environment is assumed, emphasizing the impact of communications on algorithm execution [8]. Evolution of such massively concurrent computing environments is necessary to sustain the growth of computing power as device technologies approach fundamental limits on dimensional scaling and higher device performance [9],[10].

Technical Reports List

The listings provided in this chapter were compiled by the editor from lists submitted by various individuals and institutions from whom the unpublished, internal reports are available (possibly with a modest charge). In some cases, full listings of technical reports from institutions were provided, in which case the editor has selected a few typical reports. The address information for requesting either individual reports or lists of technical reports is provided, along with brief descriptions of the reports. Neither Plenum Press nor the editor take responsibility for the accuracy of the information listed below. However, advertising such reports is felt to be important, mainly since such unpublished reports often convey the personalized view of research topics which we seek to highlight in these volumes.

Cointegration of optoelectronics and silicon ULSI for scaled, high-performance distributed computing systems

The evolution of silicon submicron technologies will yield very powerful single chip U LSI processors (possibly processor arrays) and high performance advanced packaging technologies, providing significant opportunities to realize very compact, distributed computing systems. However, exploiting that opportunity will require development of very high performance communication networks, scaled to the much smaller size and more monolithic realization of such future distributed systems. Optical communication is presently being applied to larger scale versions of such networks which, if scalable to the smaller, more monolithic world of future system structures, may help overcome several physical limits of scaled electrical networks. We review general system-level limits of scaled optical networks, assuming cointegration of Si CMOS logic, GaAs-based optoelectronics and waveguides within a common monolithic technology. The system limits suggest that a number of performance limits remain. Resolving such limits will be critical in exploiting the considerable advantages of scaled, optical interconnections for such future, highly integrated systems.

Superconducting versus optical interconnections

Summary form only given. The authors contrast the results of work on long (30 cm) YBaCuO microstrip interconnections and short ( >

University Software List

The listings provided in this chapter were compiled by the editor from lists submitted by various individuals and institutions from whom research-oriented software is available (possibly with a modest charge) to friendly users. In some cases, full listings of software from institutions were provided, in which case the editor has selected a few typical examples. The address information for requesting either individual reports or lists of software is provided, along with brief descriptions of the software. Neither Plenum Press nor the editor take responsibility for the accuracy of the information listed below.

Semiconductor devices and superconducting interconnections at 77 K: super-semi or semi-super

It is noted that, with semiconductor logic at 77 K providing an optimized, local active device behavior for logical operations, high-T/sub c/ superconducting transmission lines and Josephson tunnel junction drivers/receivers can provide a similarly optimized communications environment at 77 K. This combination of low-temperature active electronic devices and high-temperature superconducting interconnections is considered in the present work. The potential performance of transmission lines fabricated from thin-film, high-T/sub c/ superconductors is examined, and several practical issues degrading the potential performance of such interconnections are considered. Attention is given to issues connected with surface impedance, flux motion induced resistance, critical current density, thin film substrates, multilayer interconnections, high-quality surfaces, tunnel junction devices, large-area substrates, and reliability.<<ETX>>