Subal Sahni

A Grating-Coupler-Enabled CMOS Photonics Platform

We have developed a silicon photonics platform that allows monolithic integration with electronic circuits in a CMOS-compatible process. In this platform, vertical couplers are found to be a superior solution compared to traditional edge-coupling techniques. Grating couplers are an essential element in developing the optical wafer-scale test infrastructure, which in turn, enables the development of the photonic device library. The photonic devices were assembled into a 4 × 10 Gb/s transceiver die that also contains modulator drive, control, and receive electronics.

Monolithically integrated high-speed CMOS photonic transceivers

We demonstrate monolithically integrated 4×10 Gb/s WDM transceivers built in a production 130 nm SOI CMOS process. Only light sources are external to the chip. 40 Gb/s error-free, bidirectional transmission is demonstrated.

High-Speed Near Infrared Optical Receivers Based on Ge Waveguide Photodetectors Integrated in a CMOS Process

We discuss our approach to monolithic intergration of Ge photodectors with CMOS electronics for high-speed optical transceivers. Receivers based on Ge waveguide photodetectors achieve a sensitivity of 14.2 dBm ( bit error rate (BER)) at 10 Gbps and 1550 nm.

A multi-wavelength 3D-compatible silicon photonics platform on 300mm SOI wafers for 25Gb/s applications

Recently Silicon Photonics has generated an outstanding interest for integrated optical communications. In this paper we describe a 300mm Silicon Photonics platform designed for 25Gb/s and above applications at the three typical communication wavelengths and compatible with 3D integration. Main process features and device results are described.

An ultra low power CMOS photonics technology platform for H/S optoelectronic transceivers at less than

We have demonstrated a CMOS Optoelectronic technology platform, using a 650mW 4×10-Gb/s 0.13 μm silicon-on-insulator integrated transceiver chip, co-packaged with an externally modulated laser, to enable high density data interconnects at <

1 per Gbps

1 per Gbps.

Improving CMOS-compatible Germanium photodetectors

We report design improvements for evanescently coupled Germanium photodetectors grown at low temperature. The resulting photodetectors with 10 μm Ge length manufactured in a commercial CMOS process achieve >0.8 A/W responsivity over the entire C-band, with a device capacitance of <7 fF based on measured data.

25 Gb/s silicon photonic transceivers

We report on the demonstration of an integrated 4×25 Gb/s parallel optical transceiver built in Luxteras CMOS photonics platform, and discuss how we can scale this platform to even higher data rates.

Scaling CMOS photonics transceivers beyond 100 Gb/s

We report on the performance of an integrated four-channel parallel optical transceiver built in a CMOS photonics process, operating at 28 Gb/s per channel. The optical engine of the transceiver comprises a single silicon die and a hybrid integrated DFB laser. The silicon die contains the all functionalities needed for an optical transceiver: transmitter and receiver optics, electrical driver, receiver and control circuits. We also describe the CMOS photonics platform used to build such transceiver device, which consists of: an optically enabled CMOS process, a photonic device library, and a design infrastructure that is modeled after standard circuit design tools. We discuss how this platform can scale to higher speeds and channel counts.

Advantages of CMOS photonics for future transceiver applications

The advantages of CMOS photonics for next generation transceiver applications are outlined in terms of raw bandwidth, channel capacity, reach, power, cost, link performance and reliability. The advantages for future integration with host chips area also discussed.