Sung-Won Yoo

Effect of Temperature and Humidity on

Graphene was used for a sensing part of bottom-gate field-effect transistor (FET)-type gas sensors, and the sensing performance of the sensors was studied. We investigated the effect of temperature (<i>T</i>) and relative humidity on the gas sensitivity of bottom-gate graphene FETs prepared by the inductively coupled plasma chemical vapor deposition method. The conductivity change of graphene exposed to nitrogen oxide (NO₂) and ammonia (NH₃) was increased with increasing temperature and humidity. For NO₂ gas, the graphene FET shows increasing <i>ID</i> with increasing <i>T</i> and also increasing <i>ID</i> with increasing humidity. However, the FET shows an opposite trend with the <i>T</i> and humidity for NH₃ gas.

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In this brief, we investigated random telegraph noise (RTN) in the gate-induced drain leakage (GIDL) current of a MOSFET. Using the resulting RTN measurement data, the capture cross section (σ<i>c</i>) of the trap was extracted, and a more accurate σ<i>c</i> model was introduced. The bias dependence of σ<i>c</i> was then analyzed.

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In this paper, we analyzed the amplitude of variable junction leakage currents caused by the interaction between two interface states in MOS transistors. For the first time, an analytical equation for the ratio between the junction leakage current before and after electron capture into the slow state was derived with consideration of both the change in the capture cross-section and the electric field. Also, the correct equation for the electric field after electron trapping was derived and used. The distance between the two interface states was extracted from the equation and measurement data. The extracted distance was interpreted under the framework of the inter-atomic distance in the silicon lattice structure at the Si/SiO2 interface.

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The analyses on self-heating effect in 7 nm node non-rectangular Bulk FinFET device were performed using 3D device simulation with consideration to contact via and pad. From selfheating effect simulation, the position where the maximum lattice temperature occurs in Bulk FinFET device was investigated. Through the comparison of thermal resistance at each node, main heat transfer path in Bulk FinFET device can be determined. Selfheating effect with device parameter and operation temperature was also analyzed and compared. In addition, the impact of interconnects which are connected between the device on self-heating effect was investigated.

Gas Sensitivity of Bottom-Gate Graphene FETs Prepared by ICP-CVD

This paper presents an analysis of the Random Telegraph Noise (RTN) of the Gate-Induced Drain Leakage (GIDL) of a Metal Oxide Semiconductor Field Effect Transistor (MOSFET). The RTN data that was measured and analytical equations are used to extract the values of the parameters for the vertical distance of the oxide trap from the interface and of the energy level of the interface trap. These values and equations allow for the distance r between the interface trap and the oxide trap to be extracted. For the first time, the accurate field enhancement factor γ(F), which depends on the magnitude of the electric field at the Si/SiO2 interface, was used to calculate the current ratio before and after the electron trapping, and the value extracted for r is completely different depending on the enhancement factor that is used.

Capture Cross Section of Traps Causing Random Telegraph Noise in Gate-Induced Drain Leakage Current

Mixed mode TCAD simulation using hydrodynamic transport model was performed for SRAM cell composed of 90Å silicon Bulk-FinFET. In case of worst-case trapping combination in SRAM and at high temperature (375K), read static noise margin (RSNM) is reduced by 16.1% compared to the case with empty trap and at 300K. In addition, regarding statistical variability including work function variation (WFV), random dopant fluctuation (RDF), and line-edge roughness (LER), minimum operation voltage of SRAM is about 0.36 V when minimum RSNM is 20 mV.

Analysis on the variable junction leakage in MOS transistors due to interaction between two traps

In this paper, we investigate the impact of line edge roughness (LER) combined with random telegraph noise (RTN) induced by carrier trapping on threshold voltage and stability of SRAM cells with 70 Å nanowire FETs. It is found that LER combined with RTN boosts VT fluctuation more than the case with the single noise source. Its effect can limit aggressive scaling seriously.

Analysis on Self-Heating Effect in 7 nm Node Bulk FinFET Device

In this paper, we measured four-level Random Telegraph Noise (RTN) in Gate Induced Drain Leakage (GIDL) current of Metal Oxide Semiconductor Field Effect Transistor (MOSFET). Using RTN measurement data, we extracted fundamental parameters of each trap, such as the trap depth (x_T) and energy level (E_Cox-E_T). To correctly interpret capture and emission process, capture cross section (σ_c) of the traps was extracted by applying more accurate capture cross section model and bias dependence of σ_c was analyzed using potential barrier lowering.