Sven Lanzerstorfer
Infineon Technologies
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Publication
Featured researches published by Sven Lanzerstorfer.
international symposium on power semiconductor devices and ic's | 2009
Christoph Kadow; Stefan Decker; Donald Dibra; Norbert Krischke; Sven Lanzerstorfer; Hubert Maier; Thorsten Meyer; Nicola Vannucci; Robert Zink
We report on using a single trench unit process for the trench isolation and for the trench power MOSFET of a common-drain smart power IC technology. The trench power MOSFET has a maximum specific on-resistance, (Ron⋅A), below 50mΩ-mm2 and a typical breakdown voltage, Vbr, of 95V. The trench isolation provides well isolation up to 90V. Using a single trench unit process for both devices results in low process costs. In addition both power and logic areas of a chip benefit from the trench process.
Archive | 2005
Sven Lanzerstorfer
Archive | 2004
Norbert Krischke; Thomas Krotscheck; Sven Lanzerstorfer; Mathias Racki; Nicola Vannucci; Markus Zundel
Archive | 2001
Sven Lanzerstorfer; Hubert Maier
Archive | 2006
Nicola Vannucci; Sven Lanzerstorfer
Archive | 2000
Sven Lanzerstorfer; Hubert Maier
Archive | 2015
Robert Zink; Stefan Decker; Sven Lanzerstorfer
Archive | 2006
Dietmar Kotz; Norbert Krischke; Sven Lanzerstorfer; Hermann Peri; Markus Zundel
Archive | 2015
Yulia Kotsar; Sven Lanzerstorfer; Robert Zink
Archive | 2006
Dietmar Kotz; Norbert Krischke; Sven Lanzerstorfer; Mattias-Hermann Dr. Peri