Syed Askari

Highly reliable A/D converter using analog voting

Analog and digital circuits are both prone to failure due to transient upsets, variations, etc. Redundancy techniques, such as N-tuple Modular Redundancy, has been widely used to correct faulty behavior of components and achieve high reliability for digital circuits, whereas, not much has been done on the analog side. In this paper, we propose a redundancy based fault-tolerant methodology to design a highly reliable analog to digital converters (ADC). Our methodology employs redundant analog blocks and chooses the best result using an innovative analog voter. Experimental results are reported to verify the concepts, measure the systempsilas reliability and tradeoff reliability versus cost and power.

Scalable mean voting mechanism for fault tolerant analog circuits

Redundancy techniques, such as N-tuple modular redundancy has been widely used to improve the reliability of digital circuits. Unfortunately nothing substantial has been done for the analog and mixed signal systems. In this paper, we propose a redundancy based fault-tolerant methodology to design a highly reliable analog systems. The key contribution of our work is an innovative analog mean voter. This mean voter is a low power, small area, very high bandwidth and linearly scalable voting circuit. Unlike digital voter which works with odd N in an NMR, for analog circuits the mean analog voter works for both odd and even N and hence reduces the area and power further. For the proof of concept, we designed two fault tolerant circuits i.e. a low pass anti-aliasing analog filter and a flash ADC. Experimental results are reported to verify the concepts and measure the systems reliability when single upset transient may occur.

An on-chip NBTI monitor for estimating analog circuit degradation

Negative Bias Temperature Instability (NBTI) degrades the life-time of both the analog and digital circuits significantly and has become a major concern in nanoscale regime. In analog circuits, the DC biasing voltage is always present irrespective of the input signal. Therefore, coupled with high operating temperature (due to digital switching and high packaging density of SoC) and constant DC bias there would be continuous NBTI stress in analog circuits with minor or almost no recovery. Moreover, mismatch and input referred offset voltage caused by NBTI in differential pairs, current sources and cascode stages can cause instantaneous failure or catastrophic failure after certain time period. The problem of NBTI is usually addressed by leaving large design margins or employing adaptive body bias/adaptive voltage scaling based calibration algorithms using on-chip sensors or monitors. We present an ultra low power and small area on-chip NBTI sensor which can be used for accurately sensing the NBTI degradation in analog circuits. We have shown that the temporal degradation in threshold voltage of pMOS transistor in analog circuits has high correlation to the variation of reference voltage of our NBTI sensor which can be exploited for accurate calibration of analog circuits. Measurement results are also provided for the proposed sensor fabricated in commercially available 65nm process.

Highly reliable analog filter design using analog voting

N-Modular Redundancy (NMR) is the most commonly used failure mitigation technique, in which a voting unit is used to vote out the wrong path/data. The voter is, therefore, vital for nanoscale analog and digital circuits in which high defect rate is expected. In this paper, we propose a redundancy based fault-tolerant methodology to design fault tolerant analog filters. The key contribution of our work is an innovative mean voter which is very fast, inexpensive and linearly scalable with respect to the redundancy factor. For the proof of concept, we designed a 4th order high frequency Gm-C filter and a 5th order Opamp-RC filter and reported the circuits reliability.

Scalable mean voter for fault-tolerant mixed-signal circuits

Redundancy techniques, such as N-tuple modular redundancy has been widely used to improve the reliability of digital circuits. Unfortunately nothing substantial has been done for the analog and mixed signal systems. In this paper, we propose a redundancy based fault-tolerant methodology to design a highly reliable analog and digital circuits and systems. The key contribution of our work is an innovative mean voter. This mean voter is a low power, small area, very high bandwidth and linearly scalable voting circuit. Unlike other conventional voters which works with odd N in an NMR, the mean voter works for both odd and even N for analog units and hence reduces the area and power further. For the proof of concept, we designed two fault tolerant analog circuits i.e. a low pass anti-aliasing analog filter and a 4-bit flash ADC. We also presented fault-tolerance mechanism in 4-bit binary adder and an FPGA cell for demonstrating its advantage in digital applications. Experimental results are reported to verify the concepts and measure the systems reliability when single upset transient may occur.

Fault-tolerant A/D converter using analogue voting

Analogue and digital circuits are both prone to failure because of device degradations, transient upsets and large parametric variations. Redundancy techniques, such as N-tuple modular redundancy, have been widely used to correct faulty behaviour of components and achieve high reliability for digital circuits. In this study, the authors propose a redundancy based fault-tolerant methodology for analogue circuits. In particular, the authors focus on highly reliable analogue-to-digital converter, which is a critical component in many mixed-signal systems. The authors methodology employs redundant analogue blocks and chooses the best result using an innovative analogue voter. Simulation results are reported to verify the concepts, measure the systems reliability and trade off reliability against cost and power.

A design for reliability methodology based on selective overdesign

Negative Bias Temperature Instability and Channel Hot Career degrades the life time of both the analog and digital circuits significantly and should be a major concern in nanoscale regime. These problems are usually addressed by leaving large design margins (called overdesign) or employing complicated calibration algorithm both of which result in larger area as well as excessive power consumption. We present a methodology to grade critical sections of a circuit and selectively overdesign them to harden the circuit characteristics against of these degradation. We have demonstrated our approach for various example circuits. For these examples, compared to conservative overdesign techniques, our approach achieves up to 20% and 33% improvement for area and power, respectively.

Automated G m C filter design: A case study in accelerated reuse of analog circuit design

The increasing complexity of analog design for SoCs has become a bottleneck due to the lack of established design automation flows. Consequently, reuse of analog design IP (intellectual property) is becoming increasingly prevalent in the semiconductor industry. Traditional design reuse approaches still require a considerable amount of a designers time for a new set of specifications or migration to new technology nodes. This paper describes an accelerated design reuse strategy for analog circuit design using design automation techniques. As a case study, we developed an automated GmC filter design flow using a combination of heuristic and stochastic optimization methods. The resultant IP is capable of generating SPICE netlists for wide sets of specifications and different technology nodes with minimal designer effort.

Design methodology for mitigating transient errors in analogue and mixed-signal circuits

N-tuple modular redundancy techniques have been widely used to improve the reliability of digital circuits. Unfortunately, an equivalent technique has been rarely used for analogue and mixed-signal systems. In this study, propose a redundancy-based fault-tolerant methodology is proposed to design highly reliable analogue and mixed-signal circuits. The key contribution of the proposed work is: (a) systematic sensitivity analysis to identify critical nodes in a circuit and (b) a design methodology for improving the reliability of analogue and mixed-signal circuits using an innovative mean voter. The mean voter is a low-power, small area, very high bandwidth and linearly scalable unit; and it works for both odd and even redundancy factors. For the proof of concept, the authors designed two analogue-to-digital converters and an analogue filter, which are used in mixed-signal applications. Experimental results are reported to verify the concept and measure the systems reliability when failures, such as single upset transient faults, occur.

Fault tolerant circuits for highly reliable systems

Transient effects such as cosmic rays and device degradation due to aging may lead catastrophic failure in many applications. Redundancy-based techniques have been widely used to implement fault-tolerant system. N-tuple Modular Redundancy (NMR) systems, in particular, are all based on the majority voting. The voter unit, therefore, becomes a reliability bottleneck. In this paper, we advocate a circuit-level voting mechanism to design a highlily reliable system. When applied to the logic gates, analog components and on-chip interconnects, we can completely eliminate the centralized voter unit and push the redundancy to the circuit level. Our strategy achieves high reliability that is vital for mission critical systems for which high reliability and/or long lifetime is expected. Experimental results are reported to prove the concept, clarify the design procedure and measure the systems reliability.