T. Akyol

GaAs metal-oxide-semiconductor capacitors using atomic layer deposition of HfO2 gate dielectric: Fabrication and characterization

In this letter, we have investigated the physical and electrical characteristics of atomic layer deposition of HfO2 on GaAs substrates. X-ray photoelectron spectroscopy (XPS) analysis revealed no significant reduction of arsenic oxides upon deposition of HfO2 on GaAs using tetrakis(dimethyl-amino)hafnium [Hf(NMe2)4] as the metallic precursor. However, XPS confirmed the absence of arsenic oxides at the interface of HfO2 and sulfide-treated GaAs. High-resolution transmission electron microcopy analysis verified a smooth interface between HfO2 and sulfur-passivated GaAs. In addition, frequency dispersion behavior of capacitors on p-type GaAs substrates was remarkably improved by employing an appropriate surface chemical treatment.

Atomic layer deposited beryllium oxide: Effective passivation layer for III-V metal/oxide/semiconductor devices

Electrical and physical characteristics of the atomic layer deposited beryllium oxide (BeO) grown on the Si and GaAs substrates were evaluated as a barrier/passivation layer in the III-V devices. Compared to Al2O3, BeO exhibits lower interface defect density and hysteresis, and smaller frequency dispersion and leakage current density at the same effective oxide thickness, as well as an excellent self-cleaning effect. These dielectric characteristics combined with its advantageous intrinsic properties, such as high thermal stability, large energy band-gap(10.6 eV), effective diffusion barrier, and low intrinsic structural defects, make BeO an excellent candidate for the interfacial passivation layer applications in the channel III-V devices.

Self-aligned inversion-type enhancement-mode GaAs metal-oxide-semiconductor field-effect transistor with Al2O3 gate dielectric

In this letter, we report fabrication of self-aligned inversion-type enhancement-mode GaAs metal-oxide-semiconductor (MOS) field-effect transistors with atomic layer deposition of Al2O3 gate dielectric directly on GaAs substrates using a simple ex situ wet clean of GaAs. Thermal stability of the gate stack was examined by monitoring the frequency dispersion behavior of GaAs MOS capacitors under different annealing conditions. A maximum drive current of ∼4.5μA∕μm was obtained for a gate length of 20μm at a gate overdrive of 2.5V. The threshold voltage and subthreshold slope were determined to be ∼0.4V and ∼145mV∕dec from the corresponding Id-Vg characteristics.

Comparison of the self-cleaning effects and electrical characteristics of BeO and Al2O3 deposited as an interface passivation layer on GaAs MOS devices

Beryllium oxide (BeO) is a promising dielectric because of its high energy bandgap (10.6 eV) and short Be and O atom bonds and its excellent electrical insulating characteristics and high thermal stability. In a previous study, the authors showed that BeO grown by atomic layer deposition (ALD) as a gate dielectric on Si and GaAs substrates has excellent electrical and physical characteristics. In this work, we used monochromatic x-ray photoelectron spectroscopy (XPS) and electrical analysis to compare the ability of ALD BeO and Al2O3 to reduce the surface oxide on GaAs substrates. High resolution XPS shows that the BeO reduced surface oxide more efficiently than Al2O3 and that the capacitance-voltage characteristics correspond with the XPS results. In addition, ALD BeO exhibits less interfacial oxide growth after post-deposition annealing and a more efficient suppression of the leakage current

Epitaxial ALD BeO: Efficient Oxygen Diffusion Barrier for EOT Scaling and Reliability Improvement

In a previous study, we demonstrated that the BeO film grown by atomic layer deposition (ALD) on Si and III-V metal-oxide-semiconductor devices has excellent electrical and physical characteristics. In this paper, we discuss the physical and electrical properties of ALD BeO as an oxygen diffusion barrier on scaled 4-nm HfO2/BeO gate stacks. Thin BeO layers are deposited onto (100) p-Si substrates as an alternative to SiO2 as an interfacial passivation layer (IPL). X-ray photoelectron spec troscopy and transmission electron microscopy show that the BeO IPL acts as an effective oxygen barrier against SiOιι. native oxide formation during postdeposition annealing (PDA). The use of ALD BeO as an oxygen diffusion barrier results in lower equivalent oxide thickness, more competitive leakage current, and better reliability characteristics after PDA than Al2O3 and HfO2 gate stacks.

Hall mobility measurements in enhancement-mode GaAs field-effect transistors with Al2O3 gate dielectric

We report the direct measurement of the inversion charge density and electron mobility in enhancement-mode n-channel GaAs transistors using gated Hall bars. The Hall data reveal the existence of a reduced mobile charge density in the channel due to significant charge trapping. The peak electron mobility was found to be relatively high (∼2140 cm2/V s), in agreement with inherent high carrier mobility of electrons in III-V materials.

Inversion type InP metal oxide semiconductor field effect transistor using novel atomic layer deposited BeO gate dielectric

We present results on n-channel inversion-type indium phosphide (InP) metal-oxide-semiconductor field-effect transistors (MOSFETs) with atomic layer deposited (ALD) beryllium oxide (BeO) gate dielectric using the gate-last process. InP MOSFETs with the BeO gate stack were realized with high performance including the improved drive current, subthreshold swing, and a peak effective electron mobility. The transmission electron microscopy and x-ray photoemission spectroscopy measurements demonstrate an interface between BeO and InP substrates with high quality and efficient thermal stability. The use of ALD BeO as a gate dielectric may be a potential solution for future III-V MOS device fabrication.We present results on n-channel inversion-type indium phosphide (InP) metal-oxide-semiconductor field-effect transistors (MOSFETs) with atomic layer deposited (ALD) beryllium oxide (BeO) gate dielectric using the gate-last process. InP MOSFETs with the BeO gate stack were realized with high performance including the improved drive current, subthreshold swing, and a peak effective electron mobility. The transmission electron microscopy and x-ray photoemission spectroscopy measurements demonstrate an interface between BeO and InP substrates with high quality and efficient thermal stability. The use of ALD BeO as a gate dielectric may be a potential solution for future III-V MOS device fabrication.

Fast and slow transient charging in various III-V field-effect transistors with atomic-layer-deposited-Al2O3 gate dielectric

We report measurement of fast transient charging effects (FTCE) in enhancement-mode n-channel GaAs, InP, and In0.53Ga0.47As field-effect transistors (FETs) using Al2O3 as the gate dielectric. The FTCE data reveal superior drive current and enhanced threshold voltage stability for In0.53Ga0.47As FETs. We further report charge pumping measurements for In0.53Ga0.47As transistors, revealing that the majority of interface traps are donor traps, as well as an increased trap density within the Al2O3 bulk. Such data, together with FTCE data, reveal that drain current degradation observed during pulsed I-V measurements is predominantly due to slow oxide traps, underscoring their significance within III-V/high-κ metal-oxide-semiconductor FETs.

ALD beryllium oxide: Novel barrier layer for high performance gate stacks on Si and high mobility substrates

Electrical and physical characteristics of the atomic layer deposited (ALD) beryllium oxide (BeO) grown on the Si and III–V substrates were evaluated as a barrier layer for metal-oxide-semiconductor (MOS) devices. High thermal stability, large energy bandgap (10.6eV), effective diffusion barrier, and low interface defects make BeO an excellent candidate for the interfacial passivation layer in the Si and III–V channel devices.

Accurate inversion charge and mobility measurements in enhancement-mode GaAs field-effect transistors with high-k gate dielectrics

Recently, extensive studies have been conducted [1–5] in order to realize enhancement-mode III–V MOSFETs by improving the interface between gate oxide and III–V channel. The carrier mobility in advanced substrates is generally regarded as a figure of merit in benchmarking high-mobility channel materials against bulk Si substrates. However, charge trapping can be a source of error in mobility calculation using split C-V method for Si MOSFETs with high-k dielectrics [6]. On the other hand, magnetotransport measurements are suitable for direct measurement of inversion charge density (Ninv) and mobility in MOS devices with high-k gate dielectrics, where significant charge trapping makes evaluation of inversion charge density using split C-V method inaccurate. In this work, we employ gated-Hall-bar (GHB) structures to directly measure the inversion charge and mobility in a GaAs MOSFET.