T. Cohen-Hyams

Structure of Electrodeposited Cobalt

The structure of cobalt formed by electrodeposition and the influence of the pH of the plating solution and the cathode potential was studied by potentiodynamic measurements and X-ray diffraction. It was found that the level of overpotential significantly affects the structure of the formed cobalt. When electrodeposition is performed far from equilibrium conditions, i.e., at a high overpotential, face-centered cubic (fcc) cobalt is deposited while at low overpotential hexagonal close packed Co is formed with a lower rate of hydrogen evolution. A higher overpotential is needed in a neutral compared to acidic solution in order to enhance the evolution of hydrogen that is required for the formation of fcc cobalt.

Nonvolatile low-voltage memory transistor based on SiO2 tunneling and HfO2 blocking layers with charge storage in Au nanocrystals

We demonstrate a low voltage nonvolatile memory field effect transistor comprising thermal SiO2 tunneling and HfO2 blocking layers as the gate dielectric stack and Au nanocrystals as charge storage nodes. The structure exhibits a memory window of ∼2 V at an applied sweeping voltage of ±3 V which increases to 12.6 at ±12 V. Retention tests show an extrapolated loss of 16% after ten years in the hysteresis width of the threshold voltage. Dynamic program/erase operation reveal an approximately pulse width independent memory for pulse durations of 1 μs to 10 ms; longer pulses increase the memory window while for pulses shorter than 1 μs, the memory windows vanishes. The effective oxide thickness is below 10 nm with very low gate and drain leakage currents.

A nonvolatile memory capacitor based on Au nanocrystals with HfO2 tunneling and blocking layers

We report on a nonvolatile memory capacitor based on gold nanocrystals serving as charge storage elements located between two HfO2 films acting as the tunneling and control layers. The capacitor has an equivalent oxide thicknesses of 7 nm and exhibits a large hysteresis in the C-V characteristics of 1 and 9 V for gate voltage sweeps of ±1 and ±7 V, respectively, with no frequency dependence in the range of 10 kHz to 1 MHz. The storage charge density is ∼1.2×1013 cm−2 and the flat band voltage shift is stable for write/erases operations with a voltage swing of ±5 V for over 18 h.

Electrodeposition of Granular Cu-Co Alloys

Electrodeposition characteristics of Cu-Co films were studied for the formation of heterogeneous alloys for giant magnetoresistance applications. In situ scanning tunneling microscopy. Auger electron spectroscopy (AES), and high resolution scanning electron microscopy studies showed that rough lilms with a low concentration of cobalt [Cu92.5-Co7.5] (atom %) were deposited mainly due to a higher deposition rate of copper than of cobalt toward the end of the deposition process, and due to the formation of copper grains after the electrodeposition process by chemical exchange between copper ions in the solution and with the cobalt in the deposit, AES analysis resealed that the Cu-Co film is not homogeneous: the bulk of the film is richer in Co while the surface and the bottom of the film are Co-poor. X-ray diffraction showed that the electrodeposition is a topotaxial crystallization process and that the as-deposited film is composed of two phases, a solid solution of face centered cubic Cu-Co with preferred orientation of {111} plane, and a hexagonal close packed Co phase, Scanning electron microscopy micrographs and energy dispersive spectroscopy indicated the segregation of cobalt grains resulting from thermal treatments, according to the phase diagram of Cu-Co.

A Nonvolatile Memory Capacitor Based on a Double Gold Nanocrystal Storing Layer and High-k Dielectric Tunneling and Control Layers

We present a metal-insulator-semiconductor nonvolatile memory capacitor based on two gold nanoparticle charge storage layers, two Hf0 2 layers, and a multilayer HfNO/HfTiO stack. The device exhibits an equivalent oxide thickness of 7.3 nm, a hysteresis of 15 V at a gate voltage of +11 to -8 V, and a storage charge density of 2.75 × 10 13 cm -2 . A leakage of 3.6 × 10- 5 A/cm 2 at -10 V, a breakdown voltage of 13.3 V, and good retention properties with a hysteresis window of 10 V following more than 10 h of consecutive write/erase operations with a ±7 V swing were demonstrated. The capacitor characteristics are frequency-independent in the 10 kHz-1 MHz range.

A highly sensitive broadband planar metal-oxide-semiconductor photo detector fabricated on a silicon-on-insulator substrate

A high sensitivity photo-detector operating in the 245 to 880 nm wavelength range is reported. It is based on a planar Metal-Oxide-Semiconductor (MOS) structure fabricated on an insulator on silicon substrate where the insulator layer comprises a double layer dielectric stack of SiO2-HfO2. The MOS detector undergoes a voltage stress process after which it exhibits a record high responsivity of 0.4 A/W at 500–600 nm and 0.1 A/W at the spectrum edges, 245 and 880 nm. The structure is significantly simpler to fabricate than P-N or P-I-N junction devices and offers a lower dark current than Metal-Semiconductor-Metal diodes. Oxygen vacancies induced in the HfO2 sub-layer by the voltage stress form the conduction paths of the photo generated carriers. The penetration, under reverse bias conditions, of holes originating in the Si depletion layer is improved under illumination since their potential barrier is lowered. The compatibility with complimentary MOS technology processes makes this new structure attractiv...

Non-volatile memory transistor based on Pt nanocrystals with negative differencial resistance

We report on the structural and electrical characteristics of non-volatile memory (NVM) transistors and capacitors that use Pt nanocrystals (NCs) for charge storage. The transistor exhibits a memory window of 0.6 V for a sweep of ±2.5 V which increases to 11.5 V at ±10 V. The trapped charges (electron and hole) density for a ±10 V write/erase signal are 2.9 × 1013 cm−2. At small source to drain voltages (VSD) and for delay times longer than 0.1 ms, negative differential resistance (NDR) type behavior of the transistor source to drain ISD-VSD characteristics is revealed. The physical mechanism responsible for the NDR is related to the dynamics of electron injection (by tunneling through the thin bottom oxide) and their trapping by the Pt NCs. The large storage capability and relatively low program/erase voltages as well as the use of Pt, that is a Fab friendly material, make the described NVM transistors promising for practical applications.

Optical properties of nonvolatile memory capacitors based on gold nanoparticles and SiO2–HfO2 sublayers

We describe the effect of optical excitation of state of the art nonvolatile memory capacitors. The devices comprise Au nanocrystals sandwiched between a SiO2 tunneling layer and a HfO2 blocking layer and exhibit an effective oxide thickness of 7.5 nm. The memory properties are modified by the optical excitation due to nonequilibrium depletion. Optical control with different illumination wavelengths as well as variable optical intensities and pulse widths is described.

Ultraviolet to near infrared response of optically sensitive nonvolatile memories based on platinum nano-particles and high-k dielectrics on a silicon on insulator substrate

An optically triggered nonvolatile memory based on platinum nano-particles embedded within a SiO2 and HfO2 dielectric stack on a silicon on insulator (SOI) substrate is presented. The memory cell exhibits a very wide spectral response, from 220 nm to 950 nm; much wider than common photo-detectors fabricated on SOI. It offers several functionalities including a low programming voltage and wide hysteresis of the capacitance-voltage characteristics, an illumination and voltage sweep amplitude dependent hysteresis of the current-voltage characteristics, and plasmonic enhanced, efficient broad-band photo detection.

Highly sensitive optically controlled tunable capacitor and photodetector based on a metal-insulator-semiconductor on silicon-on-insulator substrates

We describe a new type of optically sensitive tunable capacitor with a wide band response ranging from the ultraviolet (245 nm) to the near infrared (880 nm). It is based on a planar Metal-Oxide-Semiconductor (MOS) structure fabricated on an insulator on silicon substrate where the insulator layer comprises a double layer dielectric stack of SiO2-HfO2. Two operating configurations have been examined, a single diode and a pair of back-to-back connected devices, where either one or both diodes are illuminated. The varactors exhibit, in all cases, very large sensitivities to illumination. Near zero bias, the capacitance dependence on illumination intensity is sub linear and otherwise it is nearly linear. In the back-to-back connected configuration, the reverse biased diode acts as a light tunable resistor whose value affects strongly the capacitance of the second, forward biased, diode and vice versa. The proposed device is superior to other optical varactors in its large sensitivity to illumination in a ver...