T. Van Duzer

Novel all-high Tc epitaxial Josephson junction

Josephson junctions are essential components in high‐temperature superconductive integrated circuits. YBaCuO/Nb‐doped SrTiO3/YBaCuO epitaxial Josephson junctions have been designed, fabricated, and tested. The YBaCuO and Nb‐doped SrTiO3 films were deposited by off‐axis sputtering. Both dc and ac Josephson effects have been observed and the supercurrent persists up to 80 K. The critical current density is an exponential function of the barrier layer thickness. The product of critical current and normal resistance is between one and three millivolts. A superconducting quantum interference device made of the junctions displays magnetic field modulation of critical current.

Data-driven self-timed RSFQ digital integrated circuit and system

A novel asynchronous timing scheme, data-driven self-timing (DDST) is proposed and implemented in Rapid Single-Flux-Quantum (RSFQ) superconductive integrated circuits. In this asynchronous approach, the timing signals are generated from the data and no global clock is needed to drive the RSFQ circuit and system. The essence of the self-timing scheme is to localize the system timing in order to avoid the overhead of global clock distribution, and to minimize the timing uncertainty. The DDST scheme has been applied to the design of a shift register, a demultiplexor, and a self-timed high speed digital test system. In this paper, test results of a 4-bit DDST shift register and a high speed on-chip clock generator will be presented to demonstrate the successful DDST operation of RSFQ integrated circuits at a rate of 20 Gb/s.

An exposure model for electron-sensitive resists

We present a mathematical model for the exposure of electron-sensitive resists where an electron beam is incident normal to a substrate coated with a thin layer of resist. We include both the scattering of the incident electrons as they penetrate the resist and the electrons backscattered from within the resist and from the substrate. The calculations yield contours of equal absorbed energy density, and these are interpreted as the contours which bound the resist after development. The absorbed energy density is found as the sum, for all electrons, of the product of the energy absorbed per unit length of trajectory and the flux density of electrons at the point in question. We first calculate the absorbed energy density for an electron beam of vanishingly small cross section (an incident delta function) and then convolve that result with a beam of Gaussian current-density distribution to obtain the reSult for a single beam location. For poly(methyl methacrylate) resist, we study the achievable dot resolution, as a function of the incident charge, for various incident energies-and substrates. Since our main interest is in computer-controlled resist exposures in which patterns are generated as a succession of dots, we calculate the absorbed energy density contours for a line generated in that manner. Detailed comparison is made with the experimental results of Wolf et al., by fitting a single point on one contour at one beam energy to account for the unknown developer sensitivity. The resulting contours predict the undercutting effect experimentally observed for the 5-20-keV beam energies studied. The developed shape and linewidth are found to be nonlinear functions of the incident charge per unit length. Experimental data for the linewidth at 20 keV are presented and compared with theory.

dc analysis of parallel arrays of two and three Josephson junctions

Arrays of Josephson junctions are becoming of increasing interest, and the dependence of the maximum zero‐voltage current on various factors is important in applications. When the array carries the maximum possible zero‐voltage current it is said to be in the critical state. Sets of equations describing the critical‐state behaviors of arrays of two and three junctions are derived. Account is taken of possible differences of the individual critical currents, self‐induced flux, and asymmetric current feed. In a space having the phase differences across the junctions as coordinates, one can construct a locus relating the phase differences that are obtained when the array is in the critical state. It is shown that the periodic, symmetric, and other properties of the various relationships between variables can be inferred from the properties of the phase‐difference locus.

Magnetic imaging of moat‐guarded superconducting electronic circuits

Superconducting electronic circuits surrounded by various configurations of holes in the superconducting ground plane have been imaged using a high resolution scanning superconducting quantum interference device (SQUID) microscope. These data demonstrate that in the weak field limit continuous moats trap flux more effectively to protect the circuits than small holes in the same configuration.

rf impedance of superconducting weak links

The rf impedance of a superconducting weak link with negligible capacitance is calculated for a variety of operating conditions. It is shown that the impedance is always real between harmonic steps of the I‐V characteristic. The real part of the impedance is negative under certain conditions of bias for small rf signals, thus indicating the region of self‐oscillation of the weak link.

A new high-speed periodic-threshold comparator for use in a Josephson A/D converter

A Josephson comparator based on a nonhysteric one-junction superconducting quantum interference device (SQUID) for use in a periodic-threshold A/D (analog-to-digital) converter is discussed. Simulations show that a 4-bit A/D converter using this comparator could have a sampling rate of >20 GHz with an analog signal bandwidth of >10 GHz. This performance represents a factor-of-greater-than-five improvement over that of other periodic-threshold A/D converters, which are based on two- or three-junction SQUIDs. >

Monte Carlo and thermal noise analysis of ultra-high-speed high temperature superconductor digital circuits

We model the high temperature superconductor (HTS) rapid single flux quantum (RSFQ) toggle (T) flip-flop including process variations and thermal noise. A Monte Carlo method is used to calculate the theoretical yield of the circuit at speeds ranging from 1-83 GHz and for various process parameter spreads. Thermal noise is also included in the simulations and we calculate bit error rates at 1-150 GHz as a function of temperature. Our results demonstrate quantitatively the difference between HTS layouts with and without parasitic inductance. Furthermore, our simulations suggest that using the existing HTS process with a 250 /spl mu/V I/sub c/R/sub n/ product the T flip-flop operating temperature should be below 40 K in order to obtain bit error rates less than 10/sup -6/ at gigahertz speeds.

Space‐Charge Simulation in an Electrolytic Tank

This paper describes a method for the simulation of space charge in an electrolytic tank by the introduction of currents into the electrolyte by means of sources projecting through the tank floor. The theory and design criteria for this space‐charge simulation system are presented. This method of simulation is used as a means for introducing detailed space‐charge effects into the determination of electron trajectories in axially symmetric, high‐perveance electron guns. The trajectories determined by use of this system are compared with beam characteristics measured experimentally.

Superconductor—semiconductor hybrid devices, circuits and systems

Abstract This Paper reviews some ways of forming superconductor—semiconductor hybrids for operation at a suggested temperature of 45 K, which is about one-half of the critical temperature of the YBa2Cu3O7-δ family of superconductors. Semiconductor devices work better at 45 K than at room temperature and devices made with the new superconductors also should be at a good operating point. Hybridizations at the levels of devices, circuits and systems are discussed.