Tadao Akamine

Ultrashallow, high doping of boron using molecular layer doping

A new doping method named molecular layer doping (MLD) is proposed. MLD is based on surface chemical adsorption of dissolvements from induced dopant gas molecules. Ultrashallow boron‐doped layers are successfully achieved by MLD using B2 H6 gas. The p+ n junction formed by MLD exhibits excellent characteristics, with a reverse bias leakage current of less than 2.5×10−16 A/μm2 at 5 V. MLD is attractive in that it offers high‐density, shallow‐junction, damage‐free, selective doping in a short time.

Composition and Growth Mechanisms of a Boron Layer Formed Using the Molecular Layer Doping Process

A new doping process, molecular layer doping (MLD), allows for formation of extremely shallow junctions. We have studied the composition and growth mechanisms of boron layers formed on a Si substrate through the MLD process using diborane as the boron feed gas. At temperatures below 600°C, a pure boron layer is formed through the deposit of boron generated through thermal decomposition of diborane. At temperatures over 700°C, the boron layer contained silicon. At 800°C, a boron silicide layer is formed through reaction of boron with the silicon in the substrate. The growth rate of a boron silicide layer depends on the orientation of the Si substrate. However, that of a pure boron layer does not depend on the orientation. The composition of the layer after annealing at 900°C was analyzed using the RBS method and was found to be SiB6. Results of MLD processes on several kinds of underlying layers (e.g., SiO2, Si3N4, poly-Si) are also presented.

Simple structured PMOSFET fabricated using molecular layer doping

The application of molecular layer doping (MLD) to the formation of shallow source and drain regions of a PMOSFET is discussed. The MLD process consists of three steps. First, the natural oxide on the Si surface is removed by thermal cleaning to expose an active Si surface. Second, a boron adsorbed layer is formed on the Si surface. Third, boron atoms undergo solid-phase diffusion from the adsorbed layer into the bulk. The electrical characteristics of the PMOSFET in the short-channel region are superior to those of devices fabricated by conventional techniques.<<ETX>>

A stacked dielectric film for a silicon microstrip detector

Abstract Stacked dielectric films have been developed so as to be applied to a silicon microstrip detector (SSD). We expected that these stacked films would have superior properties for an integrated capacitor in terms of a high dielectric breakdown characteristic, reliability, a large capacitance and radiation hardness. We measured the capacitance and leakage current for test capacitors with single-layered silicon dioxide (SiO 2 ), single-layered silicon nitride (Si 3 N 4 ), NO (Si 3 N 4 SiO 2 ), ON (SiO 2 Si 3 N 4 ) and ONO (SiO 2 Si 3 N 4 SiO 2 ).

Charge-partitioning study of a wide-pitch silicon micro-strip detector with a 64-channel CMOS preamplifier array

Abstract The wider pitch readout operation of a 50 μm-pitch double-sided silicon micro-strip detector has been studied specifically concerning its ohmic side. Every second readout and ganged configuration was examined by employing a newly developed 64-channel preamplifier array. The observed charge responses for collimated IR light were compared with a numerical model.

Fabrication of a double-sided silicon microstrip detector with an ONO capacitor dielectric film

Double-sided silicon microstrip detectors (DSSDs) with integrated coupling capacitors formed by an oxide-nitride-oxide (ONO) dielectric film were fabricated using newly developed processing techniques. We report on the processing techniques and some characteristics of the detectors fabricated in the above process.

Characterization of an ONO-stacked insulator film for a silicon micro-strip detector

Abstract A semi-empirical model for an ONO-stacked insulator film is presented together with its implications. The model covers ONO, ON, and NO films as well as single-layered SiO 2 and Si 3 N 4 . We eventually present an assessment for estimating the lifetime of an ONO-stacked insulator film for a given configuration.

Combined use of a field-plate and narrow p-barriers for a wide-pitch ohmic-side readout of the BELLE double-sided SVD

Abstract We explored wide-pitch ohmic-side structures for the BELLE SVD, where we proposed a field-plate structure combined with narrow p-barriers in between the readout electrodes of 90, 113, 180, and 226 μm-pitch detectors. The effect of the p-barriers was studied with a numerical model to trace the carrier trajectories. The charge collection and sharing properties were examined in practice for prototype small-size detectors with an IR pulse shining from either the junction side or the ohmic side. The channel separation capabilities were also shown to be appropriate under nominal operation conditions.

Front-end interface of the SVD readout system for BELLE

The data-acquisition system for a silicon micro-vertex detector of the BELLE experiment is described with special emphasis placed on the front-end circuits and their interfaces. The description includes a 128-channel preamplifier chip, a silicon-based double-sided hybrid card, and readout control chips for digital interfaces, which are discussed in terms of both architectural and operational aspects.

New Insulator Film Of Integrated Capacitor For Silicon Strip Detector

A new stacked thick three layers ONO (silicon diOxide silicon Nitride silicon dioxide) insulator film was developed to be applied for a silicon strip detector. We expected that the ONO film had a superior integrated capacitor in terms of a high electrical breakdown voltage, long term reliability and large unit capacitance. We measured electrical behaviors of test capacitors with single layer silicon dioxide (SiOz), single layer silicon nitride (SisNd), NO (silicon Nitride silicon dioxide), ON (silicon dioxide silicon Nitride) and ONO capacitors.