Taejoong Song

A Fully Integrated UHF-Band CMOS Receiver With Multi-Resolution Spectrum Sensing (MRSS) Functionality for IEEE 802.22 Cognitive Radio Applications

Fast and accurate spectrum sensing is one of the most important functions in a cognitive radio (CR) seeking to use the licensed but unoccupied spectrum segments. In this paper, we present a fully integrated CMOS receiver with a CR spectrum sensing capability in the UHF band. We propose multi-resolution spectrum sensing (MRSS), which is a digitally-assisted analog energy detection technique. Without using bulky analog filters, detection bandwidth can be flexibly controlled by correlating the received analog signals with window signal generated by built-in digital window generator. The integrated chip has been fabricated in a standard 0.18-mumm CMOS technology, and has achieved 32 dB of detection dynamic range with minimum detection sensitivity of -74 dBm by using a 100-kHz cos4 window.

A Fully-Integrated UHF Receiver with Multi-Resolution Spectrum-Sensing (MRSS) Functionality for IEEE 802.22 Cognitive-Radio Applications

Recently, cognitive radio (CR) technology has been proposed as a way of increasing spectrum utilization efficiency. A CR system seeks to use the unoccupied spectrum segments by sensing the spectrum before transmitting to preserve the rights of privileged primary users (Haykin, 2006). IEEE 802.22 is the working group on wireless regional area network (WRAN) for the license-exempt use of the U.S. TV broadcasting band. Such use requires that new transceivers possess CR functionality. A fully-integrated CMOS receiver is presented with a CR spectrum-sensing functionality of arbitrary detection bandwidth over the UHF band. This capability is called multi-resolution spectrum sensing (MRSS).

A 122-mW Low-Power Multiresolution Spectrum-Sensing IC With Self-Deactivated Partial Swing Techniques

A low-power multiresolution spectrum-sensing (LP-MRSS) IC utilizing self-deactivated partial swing techniques is fabricated in 0.18-¿m complementary metal-oxide-CMOS technology. The LP-MRSS is composed of a low-power digital window generator, analog correlators, low-power pipeline analog-to-digital converters, and a fast-sweeping frequency synthesizer. The LP-MRSS dissipates 122 mW at a 1.8-V supply voltage achieving an approximately 33% power reduction over the previous MRSS IC.

Semi-active high-efficient CMOS rectifier for wireless power transmission

A semi-active high-efficient (SA-HE) CMOS rectifier with reverse leakage control has been developed. It employs a cross-coupled NMOS pair and two leakage control comparators to reduce reverse charge leakage current. In addition, the adaptive body bias control technique is utilized to improve the reliability of the rectifier. The SA-HE rectifier has been fabricated in a 0.18um CMOS technology and shows 15% improvement over conventional rectifiers.

A Cross-layer Cognitive Radio Testbed for the Evaluation of Spectrum Sensing Receiver and Interference Analysis

Cognitive radio (CR) technology has been proposed as a promising solution for maximizing the utilization of already-crowded spectrum resources. As new algorithms, circuits and systems are developed for CR technology, it is essential to have a reconfigurable testbed system for their verification. A multistandard, fully software driven, cross-layer CR testbed has been developed to support thorough testing of CR system and custom designed integrated circuits (ICs). This paper presents details of cross-layer CR testbed and three demonstrations of testbed usage; (a) cognitive radio system concept demonstration, (b) multi-resolution spectrum sensing (MRSS) receiver IC evaluation, (c) interference analysis for UWB coexistence with WiMax. With this reconfigurable testbed, a new idea can be easily verified, demonstrated and extended to further research.

Implementation Issues of A Wideband Multi-Resolution Spectrum Sensing (MRSS) Technique for Cognitlve Radio (CR) Systems

Spectrum sensing is a key function for a cognitive radio (CR) system. An analog-based multi-resolution spectrum sensing (MRSS) technique was proposed as a flexible, low-power, high-speed spectrum-sensing solution. In this paper, implementation issues of the MRSS technique are investigated, and the corresponding practical specifications are suggested. First, nonlinear effects from a voltage-controlled oscillator (VCO) and multipliers are explored. System simulation results show that harmonic distortion components of VCO and wavelet-pulse power levels should be controlled to alleviate these nonlinear effects. Afterward, I/Q phase- and gain-mismatch effects ore addressed. Specifically, narrow-band signals are more sensitive to these gain and phase mismatches compared to broadband digital modulated signals. Overall, phase mismatch is more sensitive than gain mismatch on MRSS performance, showing a linear degradation of a detected power-level up to a 60-degree phase-mismatch

A CMOS Integrated Analog Pulse Compressor for MIMO Radar Applications

Conventional radar pulse compressors use either surface acoustic wave devices or fast convolution processing, but both solutions have significant drawbacks. To overcome these drawbacks, an integrated analog pulse compressor for a multiple-input multiple-output (MIMO) radar has been developed with an 0.18-¿m CMOS process using an arbitrary waveform generator, analog correlators, and analog-to-digital converters. The proposed scheme not only has advantages over conventional methods but also adds additional flexibility to the MIMO system. The die area is 5.67 mm2, and the power consumption is 62.6 mW from the 1.8-V supply. Arbitrary waveforms such as the wavelet and the chirp signal have been demonstrated, and the average signal-to-noise ratio for the pulse compression is 18.09 dB. The identification of overlapping multiple chirp signals is successfully demonstrated.

A robust latch-type sense amplifier using adaptive latch resistance

A latch-type sense amplifier (SA) utilizing adaptive resistance technique is proposed. With adaptively adjusted resistance in a latch path, the proposed SA can compensate for an erroneous voltage drop in bit-lines induced by bit-cell leakage current. The simulation shows that the sense amplifier margin (SM) is improved in the presence of mismatches. The SA test chip is fabricated in a 0.18-μm CMOS technology showing the SM improvement of 6% to 15% at various supply voltages.

A fully-integrated arbitrary waveform generator for analog matched filter

In this paper, a fully-integrated synchronizable AWG for radar pulse compression is presented. For low power operation, we suggested the two-layered x-decoder scheme which includes address increment circuits so that HOaddr buffers need not to be operated in generating the repetitive waveforms. This can save the power consumption of HOaddr buffer by about 9-18% depending on HOaddr toggling ratio. The measurement results using MRSS IC show the chirp signal and Daubechies waveforms successfully.

Subthreshold current mode matrix determinant computation for analog signal processing

The matrix determinant computation system (MDCS) is developed in subthreshold current-mode for an analog signal processing. By utilizing the translinear loop principle and the novel differential architecture, the MDCS can perform accurate addition, subtraction, and multiplication in analog domain. The system computes a 2-by-2 and 3-by-3 determinant with 91 % accuracy and a 3 kHz input can be handled while consuming 110.05μW. The overall system is fabricated on a 0.18μm CMOS technology and the area is 500μm × 800μm.