Taewook Nam

MoS2 Nanosheet Phototransistors with Thickness-Modulated Optical Energy Gap

We report on the fabrication of top-gate phototransistors based on a few-layered MoS(2) nanosheet with a transparent gate electrode. Our devices with triple MoS(2) layers exhibited excellent photodetection capabilities for red light, while those with single- and double-layers turned out to be quite useful for green light detection. The varied functionalities are attributed to energy gap modulation by the number of MoS(2) layers. The photoelectric probing on working transistors with the nanosheets demonstrates that single-layer MoS(2) has a significant energy bandgap of 1.8 eV, while those of double- and triple-layer MoS(2) reduce to 1.65 and 1.35 eV, respectively.

Graphene as an atomically thin barrier to Cu diffusion into Si

The evolution of copper-based interconnects requires the realization of an ultrathin diffusion barrier layer between the Cu interconnect and insulating layers. The present work reports the use of atomically thin layer graphene as a diffusion barrier to Cu metallization. The diffusion barrier performance is investigated by varying the grain size and thickness of the graphene layer; single-layer graphene of average grain size 2 ± 1 μm (denoted small-grain SLG), single-layer graphene of average grain size 10 ± 2 μm (denoted large-grain SLG), and multi-layer graphene (MLG) of thickness 5-10 nm. The thermal stability of these barriers is investigated after annealing Cu/small-grain SLG/Si, Cu/large-grain SLG/Si, and Cu/MLG/Si stacks at different temperatures ranging from 500 to 900 °C. X-ray diffraction, transmission electron microscopy, and time-of-flight secondary ion mass spectroscopy analyses confirm that the small-grain SLG barrier is stable after annealing up to 700 °C and that the large-grain SLG and MLG barriers are stable after annealing at 900 °C for 30 min under a mixed Ar and H2 gas atmosphere. The time-dependent dielectric breakdown (TDDB) test is used to evaluate graphene as a Cu diffusion barrier under real device operating conditions, revealing that both large-grain SLG and MLG have excellent barrier performance, while small-grain SLG fails quickly. Notably, the large-grain SLG acts as a better diffusion barrier than the thicker MLG in the TDDB test, indicating that the grain boundary density of a graphene diffusion barrier is more important than its thickness. The near-zero-thickness SLG serves as a promising Cu diffusion barrier for advanced metallization.

Atomic layer deposition ZnO:N flexible thin film transistors and the effects of bending on device properties

ZnO:N flexible thin film transistors were fabricated by atomic layer deposition on polyethylene naphthalate substrates and the effects of bending on the device properties investigated. The threshold voltage and saturation mobility were observed to change with respect to the amount of substrate bending. These modulations can be explained in terms of piezoelectric nature of in ZnO. In comparison with the previously reported single crystal nanowires ZnO field effect transistors, the amount of the electrical property modulation under bent condition is significantly reduced and our report shows a much improved stability for ZnO:N as a flexible device material.

Direct imprinting of MoS2 flakes on a patterned gate for nanosheet transistors

Nanosheet transistors based on mechanically exfoliated MoS2 and other transition metal dichalcogenide layers have already been reported demonstrating good device performances. In an approach to synthesize a large area two-dimensional (2D) sheet, chemical vapor deposition methods were reported and the transfer of those sheets onto other arbitrary substrates was also attempted, although studies on the direct imprinting of such 2D semiconductor sheets are rare. Here, we report on a direct imprinting method, the polydimethylsiloxane (PDMS)-adopting approach, that enables the fabrication of patterned bottom-gate MoS2 nanosheet field-effect transistors (FETs) on any substrate; using direct printing methods MoS2 FETs were successfully fabricated on glass. Since our FETs were also controlled to be a depletion or an enhanced mode with the modulated MoS2 thickness on a patterned bottom-gate, our imprinting approach is regarded as a meaningful advance toward 2D nanosheet electronics.

The Effects of Ultraviolet Exposure on the Device Characteristics of Atomic Layer Deposited-ZnO:N Thin Film Transistors

We investigated the effects of ultraviolet (UV) light illumination on nitrogen-doped atomic layer deposited (ALD)-ZnO:N thin film transistors (TFTs). ALD ZnO:N thin films grown at 125°C were used as active layers for back-gate TFT devices. As-fabricated ALD ZnO:N TFTs showed proper drain current modulation response to a gate voltage sweep with a 5.4 V threshold voltage and a clear pinch-off. However, the threshold voltage was significantly shifted in the negative direction by UV exposure due to an associated increase in carrier concentration, resulting in the loss of current modulation by gate voltage sweep. In addition, we observed a resistivity change in ALD ZnO:N thin films with time after UV exposure. The resistivity decreased by several orders of magnitude upon UV light exposure and recovered toward its original value after switching off the UV light. Accordingly, the transfer curves of TFT devices using a ZnO:N active layer also exhibited recovery characteristics. We formed a thin Al 2 O 3 passivation layer on top of the TFT surface in order to suppress the recovery effect.

Emerging Paradigm of Crosstalk between Autophagy and the Ubiquitin-Proteasome System

Cellular protein homeostasis is maintained by two major degradation pathways, namely the ubiquitin-proteasome system (UPS) and autophagy. Until recently, the UPS and autophagy were considered to be largely independent systems targeting proteins for degradation in the proteasome and lysosome, respectively. However, the identification of crucial roles of molecular players such as ubiquitin and p62 in both of these pathways as well as the observation that blocking the UPS affects autophagy flux and vice versa has generated interest in studying crosstalk between these pathways. Here, we critically review the current understanding of how the UPS and autophagy execute coordinated protein degradation at the molecular level, and shed light on our recent findings indicating an important role of an autophagy-associated transmembrane protein EI24 as a bridging molecule between the UPS and autophagy that functions by regulating the degradation of several E3 ligases with Really Interesting New Gene (RING)-domains.

Effects of TaN Diffusion Barrier on Cu-Gate ZnO:N Thin-Film Transistors

The effects of TaN Cu diffusion barrier in Cu-gate ZnO:N thin-film transistors (TFTs) were studied. Bias stress tests were performed on Cu-gate TFTs with atomic layer deposited Al2O3 and HfO2 gate insulators. The mobility, the threshold voltage, and the reliability were significantly improved by applying a TaN diffusion barrier at the interface between the Cu gate and the gate insulator. The reduction in Cu diffusion by the diffusion barrier is a key process that increases device stability and results in improved oxide TFT performance.

Surface-Localized Sealing of Porous Ultralow-k Dielectric Films with Ultrathin (<2 nm) Polymer Coating

Semiconductor integrated circuit chip industries have been striving to introduce porous ultralow-k (ULK) dielectrics into the multilevel interconnection process in order to improve their chip operation speed by reducing capacitance along the signal path. To date, however, highly porous ULK dielectrics (porosity >40%, dielectric constant (k) <2.4) have not been successfully adopted in real devices because the porous nature causes many serious problems, including noncontinuous barrier deposition, penetration of the barrier metal, and reliability issues. Here, a method that allows porous ULK dielectrics to be successfully used with a multilevel interconnection scheme is presented. The surface of the porous ULK dielectric film (k = 2.0, porosity ∼47%) could be completely sealed by a thin (<2 nm) polymer deposited by a multistep initiated chemical vapor deposition (iCVD) process. Using the iCVD process, a thin pore-sealing layer was localized only to the surface of the porous ULK dielectric film, which could minimize the increase of k; the final effective k was less than 2.2, and the penetration of metal barrier precursors into the dielectric film was completely blocked. The pore-sealed ULK dielectric film also exhibited excellent long-term reliability comparable to a dense low-k dielectric film.

Assessment of daily exposure of endodontic personnel to extremely low frequency magnetic fields

AIM To measure daily exposure levels to extremely low frequency magnetic fields (ELF MFs) in endodontic clinics. METHODOLOGY In total, 10 subjects (five endodontic trainees, five hygienists) participated. Each volunteer wore a 60-Hz MF measurement device on the left upper arm during working hours. Measurements were taken continuously throughout the working day except at lunch time. Separate measurements were taken for specific items of equipment at several distances. RESULTS The average MF exposure for the 10 personnel was 0.03±0.04micro-Tesla (μT) (range, 0.01-6.4μT). The average MF exposure of endodontic personnel was lower than that of other hospital personnel according to the literature. Furthermore, all monitored exposure levels were well below the maximum acute exposure level, 500μT, recommended by the International Committee on Non-ionizing Radiation Protection for the protection of workers against ELF MFs. However, relatively high levels of exposure occurred in an operating room and X-ray room, presumably as a result of the use of surgical equipment such as microscopes and monitors, various motors and power cables of X-ray machines with large current flows. CONCLUSIONS The total average MF exposure level of 0.03μT was lower than the typical background level at home. Although high levels of exposure were measured in an operating room and X-ray room, the MF exposure level to dental personnel was minimal during routine endodontic clinical work.

High-Performance Ink-Synthesized Cu-Gate Thin-Film Transistor with Diffusion Barrier Formation

The improved electrical properties of Cu-gate thin-film transistors (TFTs) using an ink-synthesizing process were studied; this technology enables a low-cost and large area process for the display industry. We investigated the film properties and the effects of the ink-synthesized Cu layer in detail with respect to device characteristics. The mobility and reliability of the devices were significantly improved by applying a diffusion barrier at the interface between the Cu gate and the gate insulator. By using a TaN diffusion barrier layer, considerably improved and stabilized ink-Cu gated TFTs could be realized, comparable to sputtered-Cu gated TFTs under positive bias temperature stress measurements.