Takahiko Saba

Time-domain artificial noise generation technique using time-domain and frequency-domain processing for physical layer security in MIMO-OFDM systems

Artificial noise (AN) is one of physical layer security techniques, which can realize secure communication. AN is a noise signal which is intentionally transmitted from transmitter along with data signals. Since AN is generated to be canceled out at legitimate receivers, it can prevent eavesdroppers from eavesdropping even if transmitters do not know the existence of eavesdroppers. In spite of its usefulness, most of the AN generation techniques cannot be applied to multiple-input multiple-output (MIMO) systems when the number of antennas at the transmitter is less than that at the legitimate receiver. In this paper, we consider time-domain AN generation techniques for MIMO orthogonal frequency division multiplexing (OFDM) systems. A time-domain AN generation technique is originally proposed for single-input single-output (SISO) OFDM systems. Thus, we first consider to apply the conventional time-domain AN generation technique to MIMO-OFDM systems, and show that this technique requires a large number of antennas at the transmitter and/or a longer cyclic prefix (CP). Next, to solve this problem, we propose another time-domain AN generation technique. Our proposed time-domain AN is generated to be canceled out at the legitimate receiver in the frequency domain, while the conventional time-domain AN is canceled out in the time domain. As a result, the proposed time-domain AN generation technique can be applied to MIMO-OFDM systems, irrespective of the number of antennas and the length of CP. Simulation results can show that the proposed AN achieves the same secrecy rate as the conventional time-domain AN. Moreover, the proposed technique achieves a higher secrecy rate when a MIMO-OFDM system is employed with the antenna configuration to which the conventional time-domain AN generation technique is hard to be applied.

A novel symbol synchronization algorithm with reduced influence of ISI for OFDM systems

This paper proposes a symbol synchronization method which reduces the influence of the intersymbol interference (ISI) for orthogonal frequency division multiplexing (OFDM) systems. The proposed method extracts the timing which is not disturbed by delay spread within the guard interval (GI) by utilizing the cyclic extension. Thus, the proposed method is effective in reducing the influence of the ISI. The BER characteristics of the proposed system are evaluated using computer simulation. The results show that the system using the proposed method achieves almost the same performance as the system with perfect synchronization.

Transient response of Colpitts-VCO and its effect on performance of PLL system

In this paper, we investigate the frequency step response of the Colpitts-voltage-controlled oscillator (VCO) by solving its third-order circuit state equation. The result shows that after the capacitance change, its oscillation frequency changes to its steady state value with vibration. We also establish a more accurate transfer function of the Colpitts-VCO by considering its transient response with the assumption that the change of the capacitance is small. Moreover, we also introduce the idea of VCO time constants which represent a degree of the transient response of the VCO. Finally, to evaluate how the transient response of VCO influences on performance of phase-locked loops (PLLs), we investigate acquisition processes of PLL model using our new transfer function. In the high-speed PLL, transient response of the VCO affects acquisition performance. There might be the case where response of the acquisition changes to its steady state with vibration, even in case where there is only overshoot in conventional analysis with conventional idealized VCO model.

Third-order phase-locked loops using dual loops with improved stability

The third-order PLL has an instability problem. It is known that a system of dual loops improves the instability and suppresses the steady-state error of a third-order PLL. A conventional third-order PLL using dual loops is implemented by digital equipment. Since the digital PLL cannot be used in the high frequency band in satellite communications because of limitations of the operational frequency, conventional third-order PLL using dual loops are unavailable in such an environment. In this paper, we propose a new third-order PLL using dual loops which are implemented by analog equipment. We investigate the transient response and the steady-state behavior of the proposed PLL due to the frequency ramp transition. Results show that the steady-state phase error of the proposed PLL is suppressed. Furthermore, we show that the stability of the proposed PLL is better than that of the typical third-order PLL.

Quantization scheme for energy detector of soft decision cooperative spectrum sensing in cognitive radio

Cognitive radio technique enables unlicensed users to use the spectrum assigned to licensed users. Therefore, a highly accurate sensing technique to know the presence of licensed users is essential. For such a purpose, soft decision cooperative spectrum sensing techniques are proposed. In a soft decision cooperative spectrum sensing, the cognitive base station collects the received signal energy information from multiple users. Since the bandwidth of the control channel used for collecting the energy information is limited, it is necessary to quantize the received signal energy information in each user. In this paper, we propose a quantization scheme based on the probability of false alarm for the soft decision cooperative spectrum sensing. The quantization criterion is analytically derived, and the theoretical expression for the resultant probability of false alarm is presented with taking the quantization error into account.

Fast-acquisition PLL synthesizer using a parallel N-stage cycle swallower with low power consumption and low phase noise

A phase-locked loop (PLL) frequency synthesizer with an N-stage cycle swallower (NSCS) is one of the fastest frequency switching synthesizers, but the use of the NSCS results in high power consumption and phase noise in the UHF band. This paper elucidates these problems and proposes a fast-acquisition PLL synthesizer using a novel type of NSCS with low power consumption and low phase noise. Experimental results confirm that the use of a parallel NSCS and a prescalar results in greatly reduced power consumption and phase noise. >

WLC43-6: Turbo Equalization Combined Timing and Frequency Offsets Compensation in Uplink OFDMA Systems

In uplink orthogonal frequency division multiple access (OFDMA) systems, the amounts of carrier frequency offset (CFO) and symbol timing offset (STO) are different in each user. CFO and STO degrade the demodulation performance significantly. Thus, CFO and STO must be compensated for in OFDMA systems. However, since the amounts of CFO and STO are different in each user, CFO/STO compensation schemes proposed in orthogonal frequency division multiplexing (OFDM) systems cannot be used directly. In this paper, we propose a CFO/STO compensation scheme which uses time domain turbo equalization with soft cancellation. The proposed receiver can achieve CFO/STO compensation and channel equalization simultaneously by exploiting the path diversity gain. Furthermore, the extension of the processing duration of each symbol is considered to obtain a further path diversity gain. Simulation results show that the proposed receiver attains a bit error rate (BER) performance which is almost the same as that in the case without offset when the variance of offset among users is small.

Improvement of CCI compensation accuracy using feedback phase tracking in MIMO-OFDM systems

In MIMO-OFDM systems, a phase tracking scheme is affected by intercarrier interference (ICI) and cochannel interference (CCI) caused by residual frequency offset. In this paper, we propose a feedback phase tracking scheme to eliminate the effect of both ICI and CCI for MIMO-OFDM systems. The proposed scheme estimates the amount of residual frequency offset in the frequency domain, and compensates for it in the time domain. Thus, the effect of ICI can be reduced. Furthermore, we consider two ways for multiple channel estimation to eliminate the effect of CCI. First is the method that employs midambles. Second is the one that reuses a preamble. Thus, the channel estimation is carried out several times within the packet, and the effect of CCI can be reduced. Simulation results show the proposed scheme can compensate for residual frequency offset and CCI more accurately, and improve the PER performance.

Third-order phase-locked loops using dual loops inserting an active filter in the second loop with improved stability

In fast mobile communication systems, a phase-locked loop (PLL) should track the signal not only with the frequency step transition but also with the frequency ramp transition caused by Doppler shift. In such an environment, since a perfect second-order PLL cannot suppress the steady-state phase error, a perfect third-order PLL is required. However, the third-order PLL using an active filter cannot be used in the low S/N environment because the PLL with small loop gain becomes unstable. One of the solutions is a third-order digital PLL using dual loops. However, since the PLL is implemented by digital equipment and is limited by the operational frequency, it cannot be used in a high-frequency band employed in satellite communication. Downconverting of the operational frequency restricts the acquisition speed. Furthermore, the recomposing of the PLL with analog equipment causes the gain imbalance of the voltage-controlled oscillator (VCO) and the PLL cannot synchronize. In this paper, we propose a new third-order PLL using dual loops inserting an active filter in the second loop, which can be implemented by analog equipment. First, we show the closed loop transfer function of the proposed PLL and investigate the steady-state phase error by linear analysis. Second, we show that the proposed PLL is always stable regardless of the value of loop gain. Third, we evaluate the transient response and show the proposed PLL has acquisition time shorter than the perfect third-order PLL. Next, we show that the steady-state phase error of the proposed PLL can be suppressed to the same level of the perfect third-order PLL. Finally, we investigate the effect of noise in PLLS, and show the proposed PLL has better jitter performance than the perfect third-order PLL.

Digital phase-locked loop with wide lock-in range using fractional divider

The authors propose a novel type of digital phase-locked loop (DPLL) with both a wide initial lock-in range and a fast initial acquisition time. In this DPLL, by using a fractional divider, it is possible for an initial fixed clock to be made as the adapting free-running frequency which is dependent on the input frequency. Therefore, one can obtain a wide initial lock-in range. Furthermore, removing the frequency offset by a fractional divider and resetting the divider, this system has a fast initial acquisition time of only 16 cycles of input. The properties of the proposed DPLL are investigated by experiments and theoretical analysis, and they are compared with those of the conventional DPLL. The results show that the proposed DPLL performs well.<<ETX>>