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Dive into the research topics where Takayuki Ohba is active.

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Featured researches published by Takayuki Ohba.


international electron devices meeting | 1987

Selective CVD tungsten silicide for VLSI applications

Takayuki Ohba; Shinichi Inoue; M. Maeda

Selective CVD tungsten silicide for barrier metal and contact metallization, and for via-hole filling has been developed for VLSI devices. This new process makes possible low-temperature filling of via holes up to several order of magnitude faster than conventional selective CVD tungsten. Selective CVD tungsten silicide was investigated for its deposition characteristics, contact electrical properties, and WSix/Al bilayer properties.


international electron devices meeting | 2003

A 65 nm CMOS technology with a high-performance and low-leakage transistor, a 0.55 /spl mu/m/sup 2/ 6T-SRAM cell and robust hybrid-ULK/Cu interconnects for mobile multimedia applications

S. Nakai; M. Kojima; N. Misawa; Motoshu Miyajima; S. Asai; S. Inagaki; Y. Iba; Takayuki Ohba; Masataka Kase; Hideki Kitada; Shigeo Satoh; N. Shimizu; I. Sugiura; F. Sugimoto; Y. Setta; T. Tanaka; N. Tamura; M. Nakaishi; Y. Nakata; J. Nakahira; N. Nishikawa; A. Hasegawa; S. Fukuyama; K. Fujita; K. Hosaka; N. Horiguchi; H. Matsuyama; T. Minami; M. Minamizawa; H. Morioka

This paper presents a 65 nm CMOS technology for mobile multimedia applications. The reduction of interconnect capacitance is essential for high-speed data transmission and small power consumption for mobile core chips. We have chosen a hybrid ULK structure which consists of NCS (nano-clustering silica; k=2.25) at the wire level and SiOC (k=2.9) at the via level. Although NCS is a porous material, the NCS/SiOC structure has sufficient mechanical strength to endure CMP pressure and wire bonding. Successfully fabricated 200 nm-pitch hybrid-ULK/Cu interconnects and a high-performance and low-leakage transistors meet the electrical targets from the circuit requirements. Moreover, an embedded 6T-SRAM with a 0.55 /spl mu/m/sup 2/ small cell size has been achieved.


Applied Surface Science | 1995

Advanced multilevel metallization technology

Takayuki Ohba

In order for ULSI manufacturing to minimize the COO (cost of ownership) aspect in the wiring process and realize fabricating over 256M bits DRAM, several wiring technologies have been proposed. The evidential criteria in choosing the most probable one are physical or material limitations (e.g. step-coverage and resistivity) and requirements from manufacturing (e.g. process complexity, reliability, throughput, and total cost). Therefore, a combination of metallurgy using chemical vapor deposition (CVD) with simplified multilevel interconnects has a high potential in overcoming those difficulties. In this paper, an integrated multilevel metallization (IMM) by considering the above criteria is discussed. Alternatives of improved W-CVD, TiN-CVD using diborane (B2H6) and methylhydrazine (MH) reduction, selective W-CVD, and Cu wiring are described from our recent studies.


Seventh International IEEE Conference on VLSI Multilevel Interconnection | 1990

Selective and blanket tungsten interconnection and its suitability for 0.2-micron ULSI

Takayuki Ohba; M. Shirasaki; N. Misawa; Toshiya Suzuki; Tatsushi Hara; Y. Furumura

Voids and nondeposition were observed in via holes using blanket W and sputter Al because step coverage was significantly affected by the uniformity of the glue layer and by shadowing. In studying integrated multiple metallization (IMM), it was found that selective W adequately fills via holes down to 0.2 mu m in diameter and greatly improves step coverage, with optimum coverage even after 40% via-hole filling. Blanket W and Al wiring can thus be used for high-aspect via holes, even if step coverage is poor. The contact resistance of selective W to poly-Si is lower than that of Al/TiN in 0.2- mu m contacts. Thus, metallization based on selective W satisfies interconnection requirements in gigabit-scale integration.<<ETX>>


international interconnect technology conference | 2003

A highly reliable nano-clustering silica with low dielectric constant (k<2.3) and high elastic modulus (E=10 GPa) for copper damascene process

Masanobu Ikeda; Junya Nakahira; Yoshihisa Iba; Hideki Kitada; Nobuyuki Nishikawa; Motoshu Miyajima; Shun-ichi Fukuyama; Noriyoshi Shimizu; Kazuto Ikeda; Takayuki Ohba; Iwao Sugiura; Katsumi Suzuki; Yoshihiro Nakata; Shuichi Doi; Naoki Awaji; Ei Yano

A highly reliable nano-clustering silica (NCS) with low dielectric constant(k<2.3) and high elastic modulus (E=10 Gpa) for copper damascene process has been developed by controlling the size and distribution of pores in the NCS precursor. Using this material in a process compatible with the 90 nm technology node, we successfully demonstrated Cu wiring in NCS dielectrics.


Iete Journal of Research | 1991

Chemical Vapour Deposition of Tungsten by the Reduction of WF6 using Si, SiH4, Si2H6, Si3H8, B2H6, PH3, and H2

Takayuki Ohba; Yuji Furumura

This paper reports on the chemical vapor-deposition of tungsten (CVD W) by the reduction of WF6 using Si, silane (SiH4) polysiiane (Si2H6 and Si3H8: SinH2n+2), diborane (B2H6), phosphine (PH3), and H2. These depositions can be changed from selective to blanket configuration by increasing the deposition temperature. In the selective deposition, deposition rate of tungsten by SiH4 and SinH2n+2 reductions is faster even at low temperature than by H2, B2H6, and PH3 reductions. The deposition rate of tungsten using SiH4 and Si2H6 reductions does not change with temperatures, the only exception is WF6 reduction by H2. Deposition rate decreases with the magnitude of selectivity loss. The deposition temperature decreases with molecular number for SinH2n+2. Tungsten deposition starts at 180 °C for SiH4, 80 °C for Si2H6 and 40 °C for Si3H8. Tungsten deposits selectively in the temperature range from 300 °C to 340 °C using B2H6 and PH3. H2 reduction starts at about 250 °C, similar to Si reduction period. Silicon sub...


Archive | 1987

Method of selectively depositing tungsten upon a semiconductor substrate

Yoshimi Shioya; Yasushi Oyama; Norihisa Tsuzuki; Mamoru Maeda; Masaaki Ichikawa; Fumitake Mieno; Shinichi Inoue; Yasuo Uoochi; Akira Tabuchi; Atsuhiro Tsukune; Takuya Watanabe; Takayuki Ohba


Archive | 1993

Method for deposition of a refractory metal nitride and method for formation of a conductive film containing a refractory metal nitride

Toshiya Suzuki; Takayuki Ohba; Shimpei Jinnouchi; Seishi Murakami


Archive | 2003

Semiconductor device production method and semiconductor device production apparatus

Ade Asneil Akbar; Takayuki Ohba


Archive | 1991

METHOD OF FORMING WIRING OF A SEMICONDUCTOR DEVICE

Takayuki Ohba; Shinji Miyagaki; Tatsushi Hara; Kenji Morishita; Seiichi Suzuki; Seigen Ri

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