Takuya Fukuda

Effects of Applied Magnetic Fields on Silicon Oxide Films Formed by Microwave Plasma CVD

By using a microwave plasma deposition system in which distributions of applied magnetic fields can be varied, the effects of the ECR position and plasma species on deposition rate and deposited film quality of silicon oxide are studied. The following results are obtained: deposition rate increases when not only O2 but also SiH4 as a material gas are excited by ECR, and high-quality film equivalent to thermal SiO2 film can be formed when the ECR position is located close to the substrate. It is suggested that the process of forming high-quality film is related to highly excited ions transported to the substrate.

0.5-/spl mu/m-pitch copper-dual-damascene metallization using organic SOG (k=2.9) for 0.18-/spl mu/m CMOS applications

We developed 0.5 /spl mu/m-pitch Cu-dual-damascene metallization by using very low-k organic SOG (HSG-R7; Hitachi Chemical Co., k=2.9) as the ILD. Interconnects using HSG reduced the interconnect capacitance by 30% compared to that of interconnects using TEOS. Furthermore, the electrical characteristics, such as line and via resistances, show that the HSG-ILD combination is feasible for 0.18-/spl mu/m CMOS applications.

Advanced thermally stable silicide S/D electrodes for high-speed logic circuits with large-scale embedded Ta/sub 2/O/sub 5/-capacitor DRAMs

A process that enables good gate-oxide integrity (GOI) in W/barrier/poly-Si gates and thermally stable low-resistivity source/drain (S/D) CoSi/sub 2/ electrodes has been developed for high-speed logic circuits with large-scale embedded DRAMs that use Ta/sub 2/O/sub 5/ high-k capacitors for high-density memory cells. Spin-on-glass (SOG)-based films were used to fill in narrow spaces between wordlines, and were also directly formed on silicide films. We prevented the oxidation of silicide during the SOG-based interlayer dielectric (ILD) formation. By using these CoSi/sub 2/ electrodes, we were able to obtain contact resistance ten times lower than that of conventional non-silicide electrodes.

Planarized SiO/sub 2/ formation by a new microwave plasma system

An improved microwave plasma system is proposed to form planarized SiO/sub 2/ interlayers for LSIs. A high planarization rate was achieved by controlling the formation of a cylindrical plasma and by adjusting the frequency applied to the substrate by which ions can be impinged onto the substrate at a maximum speed. Electric damage was decreased by using oxygen ion sputtering and by suppressing the stimulated bias voltage. These features ensure that a low-damage, planarized SiO/sub 2/ film is formed at a rate of more than 200 nm/min without a stimulated bias voltage.<<ETX>>

Highly reliable SiOF film formation by ECR-CVD using SiF/sub 2/H/sub 2/

Highly stable SiOF films (/spl epsiv/=3.2-3.6) were obtained by using SiF/sub 2/H/sub 2/ and O/sub 2/. Advantages of the films formed by SiF/sub 2/H/sub 2/ process as compared to those by SiF/sub 4/ process are (1) little amount of gas desorption, (2) long-term stability after air exposure, (3) corrosion-free process for Al interconnects and (4) little damage to MOS electrical properties. This process was successfully applied to intermetal dielectrics of deep sub-micron MOS devices without causing the electrical degradation in MOS characteristics.

Highly reliable low-/spl epsiv/ (3.3) SiOF HDP-CVD for subquarter-micron CMOS applications

Highly stable SiOF films have been obtained by high-density-plasma CVD using fluorosilanes (SiF/sub 2/H/sub 2/ or SiF/sub 4/-SiH/sub 4/), and these films were applied as interlayer dielectrics in sub-quarter-micron devices. A dielectric constant (/spl epsiv/) of 3.3 and excellent film stability in terms of moisture absorption and permeability, as compared with a conventional TEOS film were obtained by optimizing the CVD conditions. The device applications showed no degradation in the threshold voltage or the hot carrier tolerance of CMOS devices.