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Featured researches published by Yoshitaka Nakamura.


Journal of Applied Physics | 1993

In situ infrared reflection and transmission absorption spectroscopy study of surface reactions in selective chemical‐vapor deposition of tungsten using WF6 and SiH4

Nobuyoshi Kobayashi; Yoshitaka Nakamura; Hidekazu Goto; Yoshio Homma

The adsorption of tungsten hexafluoride (WF6) and monosilane (SiH4) in selective chemical‐vapor deposition (CVD) of tungsten (W) is investigated in situ using Fourier‐transform infrared reflection and transmission absorption spectroscopy (FTIR RAS and TMS). The selectivity for W growth is found to originate from the dissociation of SiH4 on a W surface. That is, SiH4 dissociates on a W surface to form Si‐containing adsorbed species when the W surface is exposed to SiH4 at temperatures higher than 110 °C, whereas SiH4 does not dissociate on a SiO2 surface. On the other hand, when W and SiO2 surfaces are exposed to WF6 at temperatures from 20 to 300 °C, no adsorbed species are observed by FTIR RAS. However, WF6 can easily react with the Si‐containing adsorbed species on a W surface to form W and byproduct gases of SiHF3 and SiF4. The main surface reaction of selective W CVD can be expressed as WF6+2SiH4=W+2SiHF3+3H2. These experimental results support the selective W‐CVD mechanism previously proposed, which ...


symposium on vlsi technology | 1996

Silicon RF devices fabricated by ULSI processes featuring 0.1-/spl mu/m SOI-CMOS and suspended inductors

Digh Hisamoto; S. Tanaka; T. Tanimoto; Yoshitaka Nakamura; Shigeharu Kimura

High-performance RF devices were fabricated using standard Si ULSI processes. Suspended inductors and 0.1-/spl mu/m CMOS devices were integrated on an SOI wafer having a cavity beneath the devices. A high inductor resonance frequency of 19.6 GHz and a low 0.1-/spl mu/m SOI-NMOS noise figure as small as 0.8 dB at 2 GHz were obtained, which surpass presently available mobile telecommunication GaAs MESFETs in performance.


international electron devices meeting | 1998

Physical and chemical analytical instruments far failure analyses in Gbit devices

Yasuhiro Mitsui; Fumiko Yano; Yoshitaka Nakamura; Koji Kimoto; Tsuyoshi Hasegawa; Shigeharu Kimura; Kyoichiro Asayama

The current status and future trend of analytical instruments are discussed. Analytical instruments for failure analyses in sub-1/4 micron dimensions or less, require high spatial resolution and sensitivity at atomic levels. Using new analytical instruments, such as the nano-prober for electrical characteristics inspection in actual circuits, TEM-EELS for chemical bond analysis of nanometer area and GDS for precise composition analysis, it was found that a SiO/sub 2/ or TiO/sub x/ film formed by water from titanic acid (TiO/sub x/H/sub 2/O) produced with titan, water and chlorine, was a cause of high resistivity for a contact (CVD-W/CVD=TiN/Ti/Si) in sub-1/4 micron devices.


symposium on vlsi technology | 1995

High-performance sub-0.1-/spl mu/m CMOS with low-resistance T-shaped gates fabricated by selective CVD-W

Digh Hisamoto; Kazunori Umeda; Yoshitaka Nakamura; Nobuyoshi Kobayashi; Shin Kimura; Ryo Nagai

This paper describes the high performance of sub-0.1-/spl mu/m T-shaped gate CMOS devices fabricated by using selective W growth. The W growth achieves low-resistance gates smaller than 0.1 /spl mu/m; counter doping achieves threshold voltage scaling, resulting in a ring-oscillator gate-delay time of 21 psec.


symposium on vlsi technology | 2000

A conformal ruthenium electrode for MIM capacitors in Gbit DRAMs using the CVD technology based on oxygen-controlled surface reaction

Masahiko Hiratani; Toshihide Nabatame; Yuichi Matsui; Yasuhiro Shimamoto; Yoshitaka Sasago; Yoshitaka Nakamura; Yuzuru Ohji; Isamu Asano; Shinichiro Kimura

We have developed a novel CVD-Ru technique, clarified the growth mechanism and fabricated BST capacitors. The growth mechanism is dominated by the surface reaction which is rate-determined by the oxygen supply. Well-tuned conditions enable fabrication of any type of storage node: a concave type with a uniform 20-nm film thickness and a pillar type from a buried film. The electrode/BST interface is degraded by the reduction-oxidation reaction during the Ru-CVD, but post-annealing restores the ideal I-V characteristics.


Journal of Applied Physics | 1996

A NEW FIELD-EFFECT TRANSISTOR BASED ON THE METAL-INSULATOR TRANSITION

Kozo Katayama; Digh Hisamoto; Yoshitaka Nakamura; Nobuyoshi Kobayashi; Ryo Nagai

We propose a field‐effect tunnel transistor based on the metal–insulator transition. The principle of the switching is the metal–insulator transition, which occurs at the sheet resistance RQ (∼h/e2=25.8 kΩ). The modulation of the sheet resistance around RQ by the control gates can be magnified by the phase transition. As a result, high transconductance and high current drivability more than 10 times greater than the ultimate silicon metal‐oxide‐semiconductor transistors are obtained. The device is a thin‐film silicon‐on‐insulator structure with dual gates, one on each side of the channel. A very thin granular metal film is deposited on the Si layer. Each metal island forms a Schottky contact with the Si layer, which is completely depleted. The electrons in the metal tunnel between the islands through the Si. The metal film can have a higher Coulomb gap and current drivability than is obtained with a single tunnel junction. A temperature of less than 1/20 of the Coulomb gap energy is required to reduce the...


symposium on vlsi technology | 2001

Oxidation-resistant amorphous TaN barrier for MIM-Ta/sub 2/O/sub 5/ capacitors in giga-bit DRAMs

Yoshitaka Nakamura; Isamu Asano; Masahiko Hiratani; T. Saito; Hidekazu Goto

We demonstrate that an amorphous TaN layer with no grain boundaries shows a good oxidation-resistant performance after forming and annealing the Ta/sub 2/O/sub 5/ dielectric of MIM capacitors for DRAM applications at 550/spl deg/C in O/sub 2/ ambient. We fabricated an MIM-Ta/sub 2/O/sub 5/ capacitor with a concave-type Ru storage node on the TaN barrier metal. This showed a contact resistivity of 0.27 k/spl Omega//spl middot//spl mu/m/sup 2/, a capacitance of 20 fF/bit, and a leakage current of 0.9 fA/bit (-1 to 1 V). We further fabricated a crown-type Ru electrode to demonstrate scalability to 0.10 /spl mu/m design rules.


symposium on vlsi technology | 1996

Highly reliable SiOF film formation by ECR-CVD using SiF/sub 2/H/sub 2/

Takuya Fukuda; T. Hosokawa; Yoshitaka Nakamura; K. Katoh; Nobuyoshi Kobayashi

Highly stable SiOF films (/spl epsiv/=3.2-3.6) were obtained by using SiF/sub 2/H/sub 2/ and O/sub 2/. Advantages of the films formed by SiF/sub 2/H/sub 2/ process as compared to those by SiF/sub 4/ process are (1) little amount of gas desorption, (2) long-term stability after air exposure, (3) corrosion-free process for Al interconnects and (4) little damage to MOS electrical properties. This process was successfully applied to intermetal dielectrics of deep sub-micron MOS devices without causing the electrical degradation in MOS characteristics.


Archive | 2000

Semiconductor integrated circuit device and process for manufacture the same

Takuya Fukuda; Nobuyoshi Kobayashi; Yoshitaka Nakamura; Masayoshi Saito; Shinichi Fukada; Yoshifumi Kawamoto


Archive | 1998

Semiconductor integrated circuit device in which a conductive film is formed over a trap film which in turn is formed over a titanium film

Yoshitaka Nakamura; Tsuyoshi Tamaru; Naoki Fukuda; Hidekazu Goto; Isamu Asano; Hideo Aoki; Keizo Kawakita; Satoru Yamada; Katsuhiko Tanaka; Hiroshi Sakuma; Masayoshi Hirasawa

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