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Dive into the research topics where Katsuaki Saito is active.

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Featured researches published by Katsuaki Saito.


Japanese Journal of Applied Physics | 1992

Reactive Ion Etching of Sputtered PbZr1-xTixO3 Thin Films

Katsuaki Saito; Jai Ho Choi; Takuya Fukuda; Michio Ohue

Reactive ion etching (RIE) by CCl4 plasma of sputtered PbZr1-xTixO3 (PZT) thin film has been investigated. The etching rate of the as-deposited pyrochlore phase PZT is comparable to that of perovskite which was crystallized by 600°C annealing. Etching rate increased with increasing RF power and reached a plateau at 1.0 W/cm2. Highly anisotropic etching of PZT with little resist damage could be realized by reducing RF power.


IEEE Transactions on Electron Devices | 2007

A Planar-Gate High-Conductivity IGBT (HiGT) With Hole-Barrier Layer

Mutsuhiro Mori; Kazuhiro Oyama; Taiga Arai; Junichi Sakano; Yoshitaka Nishimura; Koutarou Masuda; Katsuaki Saito; Yoshihiro Uchino; Hideo Homma

A high-conductivity insulated gate bipolar transistor (IGBT) (HiGT) with a double diffused MOS structure and an n-type hole-barrier layer surrounding a p-layer (planar HiGT) is presented. The hole-barrier layer prevents the holes from flowing into the p-layer and stores them in the n-layer. The planar HiGT provides a better tradeoff between collector-emitter saturation voltage [VcE(sat)] and turn-off loss than conventional IGBTs, regardless of the injection efficiency of the p-layer on the collector side, while it maintains a high blocking voltage by controlling the sheet carrier concentration of the hole-barrier layer. The planar HiGT has a tough short-circuit capability of more than 10 mus at 125degC, with a saturation current similar to that of conventional IGBTs.


international symposium on power semiconductor devices and ic's | 2011

1.7kV trench IGBT with deep and separate floating p-layer designed for low loss, low EMI noise, and high reliability

So Watanabe; Mutsuhiro Mori; Taiga Arai; Kohsuke Ishibashi; Yasushi Toyoda; Tetsuo Oda; Takashi Harada; Katsuaki Saito

A novel 1.7kV IGBT with deep floating-p layers separated from trench gates has been developed to realize low loss, low EMI noise, and high reliability. Separating floating-p layers from the trench gates reduces excess V<inf>GE</inf> overshoot, which results in a 51% smaller reverse recovery dV<inf>AK</inf>/dt than the conventional IGBT. The deep floating p-layers weaken the electric field under the trenches, which results in an avalanche breakdown voltage of 2250V. In addition, the E<inf>on</inf> + E<inf>off</inf> for the proposed structure can be reduced by 47% more than that of the conventional one, maintaining a low V<inf>CE(sat)</inf> of 2.3V at 125°C.


Japanese Journal of Applied Physics | 1992

Effects of Excited Species in Electron Cyclotron Resonance Plasma on SiN Film Resistivity

Katsuaki Saito; Natsuyo Chiba; Takuya Fukuda; Kazuo Suzuki; Michio Ohue

Optical emission spectra were measured and the relationship between resistivity of SiN films which were deposited by electron cyclotron resonance chemical vapor deposition (ECR-CVD) and emission intensities from species excited by electron cyclotron resonance was clarified. With increasing microwave power of lowered reacting pressure or SiH4 gas flow rate, the light intensity from excited ions increased in comparison to the intensity from excited radicals. As a result of increasing excited ion density, the SiN film was condensed and the prismatic structure observed in low-resistivity film was not absent from high-resistivity film.


international symposium on power semiconductor devices and ic's | 2013

Novel 3.3-kV advanced trench HiGT with low loss and low dv/dt noise

Yoshiaki Toyota; So Watanabe; Taiga Arai; Masatoshi Wakagi; Mutsuhiro Mori; Masashi Shinagawa; Katsunori Azuma; Yuji Shima; Tetsuo Oda; Yasushi Toyoda; Katsuaki Saito

Novel 3.3-kV trench IGBT with low loss and low dv<sub>AK</sub>/dt noise was developed. The structural feature of the IGBTs is deep p-WELL layers separated from trench gates. This structure suppresses excess V<sub>GE</sub> overshoot and then reduces recovery dv<sub>AK</sub>/dt. Moreover, this effect is enhanced by reducing the resistance of the deep p-WELL layers (R<sub>FP</sub>). It was found that, for the first time, the trade-off characteristics between V<sub>CEsat</sub> and recovery dv<sub>AK</sub>/dt were drastically improved by separating p-WELL layers from trench gates and decreasing R<sub>FP</sub>. The recovery dv<sub>AK</sub>/dt could be reduced by 79% more than that for the conventional trench IGBT, maintaining a small V<sub>CEsat</sub> and E<sub>on</sub> equal to the conventional one.


Japanese Journal of Applied Physics | 1995

High-Quality, High-Rate SiO2 and SiN Films Formed by 400 kHz Bias Electron Cyclotron Resonance-Chemical Vapor Deposition

Takuya Fukuda; Katsuaki Saito; Michio Ohue; Kenzou Shima; Naohiro Momma

A new electron cyclotron resonance (ECR) plasma CVD system is proposed to form high-quality SiO2 and SiN films at high rates. The system applies 400 kHz voltages which ions can follow to the substrate. The system efficiently produces, without heating: 1) SiO2 films in which density and Si-O bond strength are equivalent to those of a thermally oxidized (about 1000° C) film for which deposition rate is higher than 1.2 µ m/min and 2) Si-H bond-free SiN films in which density and resistivity are higher than those of films formed by conventional plasma CVD systems and for which deposition rate is higher than 0.8 µ m/min.


applied power electronics conference | 2016

Suppression of reverse recovery ringing 3.3kV/450A Si/SiC hybrid in low internal inductance package: Next high power density dual; nHPD2

Katsuaki Saito; Daisuke Kawase; Masamitsu Inaba; Keiichi Yamamoto; Katsunori Azuma; Seiichi Hayakawa

Suppression of reverse recovery ringing from 3.3kV Si-IGBT SiC Schottky barrier diode hybrid was verified. Reducing loop inductance, consisting of internal module, busbar connection and capacitor, is effective. To realize low inductance within the module and external connection with busbar, the gap between p and n terminal is minimized whilst maintaining the creepage and clearance required by regulation standards. Functional isolation is adopted instead of basic isolation. We achieved an inductance value 9nH for a 3.3kV, 450A dual IGBT, that leads to the extinction of reverse recovery oscillation. Details of switching characteristics of Si + SiC hybrid module is compared with that of Si IGBT module with low inductance.


international symposium on power semiconductor devices and ic s | 1998

p/sup -/-layer punch-through structure with high concentration p-emitter for a light-triggered thyristor

Shuji Katoh; Jai Ho Choi; Takeshi Yokota; Atsuo Watanabe; Tetsuo Yamaguchi; Katsuaki Saito

We studied the on-state voltage reduction of a light-triggered thyristor from the viewpoints of reduced thyristor thickness and realization of a high-injection low-lifetime structure. The reduced thickness was achieved through a p/sup -/-layer punch-through structure. The high injection was achieved by a thick, highly-doped p-emitter region. The on-state voltage of a 6-kV 5.5-kA light-triggered thyristor with the p/sup -/-layer punch-through structure and with the thick, high concentration p-emitter was reduced by about 0.2 V.


international symposium on power semiconductor devices and ic's | 1997

6-kV, 5.5-kA light-triggered thyristor

Shuji Katoh; Jai Ho Choi; Takeshi Yokota; Atsuo Watanabe; T. Yamaguchi; Katsuaki Saito

A 6-kV, 5.5-kA light-triggered thyristor has been developed for BTB (back-to-back) converter systems. A double-diffused p emitter structure was used to improve the trade-off relationship between on-state voltage and blocking capability, and a high-injection low-lifetime structure was used to improve the trade-off relationship between on-state voltage and reverse recovery charge. The double-diffused p emitter consists of a thin p/sup +/ emitter in the main area and a thick p/sup -/ emitter there and elsewhere. High injection was achieved by increasing the p/sup +/ emitter concentration and decreasing the p/sup -/ emitter thickness. A locally controlled lifetime profile was used to compensate for the high injection efficiency. These structures decreased the on-state voltage by about 0.15 V.


international symposium on power semiconductor devices and ic's | 2017

Suppression of self-excited oscillation for common package of Si-IGBT and SiC-MOS

Katsuaki Saito; Tomoyuki Miyoshi; Daisuke Kawase; Seiichi Hayakawa; Toru Masuda; Yasushi Sasajima

We propose a method to design a module structure avoiding the risk of self-excited (SE) oscillation. By simplifying both the semiconductor device and lumped circuit model, oscillatory conditions can be extracted analytically. Results show good agreement with T-CAD simulation and measurement results of test modules. The method is applied to the design of next generation common package, which has realized very low system inductance. SE oscillation can be prevented for latest generation Si-IGBTs having very small feedback capacitance and SiC-MOS having high output capacitance mounted in the same common package design.

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