Tanmoy Roy

Power plane SPICE models and simulated performance for materials and geometries

A SPICE model for power plane simulation has been developed. It is based on the geometries and materials of the power planes and uses a unit cell composed of RLC elements, transmission line elements or the HSPICE W-element. Simulated resonances in the frequency domain and delays in the time domain are consistent with results calculated from physical dimensions. SPICE model simulations compare well with hardware measurements in both the frequency and time domains. The role of dielectric thickness, dielectric constant and parallel pairs of power planes is demonstrated through simulation. The spreading inductance of power planes is defined, discussed and measured. Power plane performance in terms of impedance, resonances, damping and spreading inductance is optimized by the use of a thin dielectric layer between conductive planes.

ESR and ESL of ceramic capacitor applied to decoupling applications

Power distribution system noise affects computer product timing performance, signal integrity and electromagnetic interference. Between 1 MHz and 1 GHz, the primary means of reducing power distribution noise is with ceramic decoupling capacitors. To achieve a certain target impedance, it is important to characterize the ESR of ceramic decoupling capacitors, as this directly determines the number of capacitors required on a board. A new technique to extract ESR is described in this paper. Another factor which determines the capacitance value of decoupling capacitors is the ESL (equivalent series inductance) associated with capacitors mounted on a PCB. A study that compares the ESL of different pad layout geometries is also presented.

Power plane SPICE models for frequency and time domains

A SPICE model for power plane simulation has been developed. It is based on the geometries and materials of the power planes and uses a unit cell composed of RLC elements, transmission line elements or the W-element. Important frequency and time domain properties are demonstrated through simulation, and model to hardware correlation is established in both domains.

Low impedance power planes with self damping

With the rapid increase of chip clock frequencies and power, the power distribution on printed-circuit boards must rely increasingly on power-ground plane pairs. The effects of dielectric thickness, dielectric constant, and parallel connection of power-ground plane pairs is discussed. It is shown that dielectric materials thinner than 0.5 mils naturally tend to suppress plane resonances.

Correction to "Lossy power distribution networks with thin dielectric layers and/or thin conductive layers"

Through their inherent skin losses, conductive planes around sufficiently thin dielectric layers may provide good suppression of plane resonances in printed-circuit-board power distribution networks. When combined with thin conductive layers, a resistor-like flat self-impedance and low-pass transfer-impedance profiles can be created. A lossy transmission-line grid model is used to simulate power-ground plane pairs with thin dielectric and thin conductive layers. Some of the modeling errors of the analytical planeimpedance expressions and lossy transmission-line grid plane models are compared. Simulated and measured impedances are compared on test structures with plane separation of 40 and 8 microns (1.6, and 0.3 mils).