Tatsuo Suemasu

Packaging technology for imager using through-hole interconnections in Si substrate

For high-density packaging of ICs or other devices, it is one of the essential technologies to form through-hole interconnections in a Si substrate that electric circuits are built on in advance. We have developed a fabrication technology of wafer-level-packaging (WLP) for imagers, using the through-hole interconnections from the backside of the Si substrate to the top. The package consists of a glass cap protecting an image sensing area on the top side, the through-hole interconnections as leads, the copper re-routing and solder bumps on the backside. All processes of the packaging were done at wafer level. This paper describes the fabrication process and evaluation results of the mechanical and electrical characteristics of the WLP for imagers.

Si through-hole interconnections filled with Au-Sn solder by molten metal suction method

This paper deals with a fabrication method of conductive through-holes in a silicon substrate, which can be applied for micro electro-mechanical system (MEMS) devices or high-density packaging. The through-holes are formed by deep reactive ion etching (DRIE) and filled with Au-Sn solder by molten metal suction method (MMSM). The MMSM we have proposed is capable of filling high aspect ratio thorough-holes with conductive metal. We could make more than 18,000 conductive through-holes, 30 /spl mu/m in diameter and 300 /spl mu/m in depth, in a 4 inches sized silicon (Si) wafer. We report the principle of the filling, the fabrication processes and the structure of the through-hole interconnections.

Conformal Copper Coating of True Three-Dimensional Through-Holes Using Supercritical Carbon Dioxide

Copper thin films were deposited inside true three-dimensional, high aspect ratio, and complex shaped through-holes that were formed in glass substrates. The deposition was carried out in a supercritical carbon dioxide solution from a copper complex via hydrogen reduction. The conformal thin films were successfully deposited on the sidewalls of straight, crank-shaped, and Y-shaped through-holes. The coating length increased with decreasing the deposition temperature. Numerical simulations suggested an importance of the presence of a fluid motion in the through-holes.

Cu coating inside small (15 µm) and ultrahigh-aspect-ratio (>130) through-holes using supercritical CO2 fluid

In this article, we describe novel process and equipment for fabricating through-hole interconnects embedded in an interposer. Through-holes are three-dimensionally cranked and have a small diameter (15 ?m) and an ultrahigh aspect ratio (>130). This work demonstrated Cu coating inside these through-holes. Cu deposition was carried out by supercritical fluid chemical deposition. The equipment was designed to generate a large differential pressure between the entrance and exit of the through-holes on the basis of the principle of flow reduction. The generated differential pressure assisted the transport of the Cu precursor to the exit of the through-holes. The deposition of Cu inside 1400 through-holes spreading over the glass interposer substrate was successfully demonstrated.

Wafer-Level Packaging Technology With Through-Hole Interconnections in Silicon Substrate

An advanced packaging technology with through-hole interconnections, which enables miniaturization and high-density packaging of electronic devices including MEMS devices and optical devices, has been developed. In this work, through-hole interconnections were applied to an image sensor packaging. Through-holes, 80μm in diameter and 200μm in depth, were formed from backside of the device wafer by Deep Reactive Ion Etching (DRIE). After an insulation layer was formed inside the holes, conductive material such as copper (Cu) or Gold-Tin (Au-Sn) alloy solder was filled into the holes by electroplating method or Molten Metal Suction Method (MMSM). This technology enables wafer-level packaging of the image sensor device. Some electrical characteristics and reliability performances including electric resistance, breakdown voltage, high-temperature storage test, heat cycle test, temperature-humidity test were examined. In this paper, fabrication processes, structural and electrical characteristics and reliability of the package will be reported.Copyright

Glass interposer with high-density three-dimensional structured TGV for 3D system integration

An epoch-making glass interposer having high-density three-dimensional structured through glass via (TGV) was proposed and demonstrated. By using femtosecond laser-assisted etching and plating, TGVs including bent (crank-shaped) portions were successfully fabricated inside single silica substrate. The diameter of the TGV was 15 μm and the length was 2 mm, respectively. Therefore the aspect ratio becomes 130 approximately. The pitch between the neighbor TGVs was 40 μm. Since an arbitrary interconnects can be achieved by the interposer, higher performance and more design freedom three-dimensional (3D) system integration can be expected.