Tatsuya Yamada
Panasonic
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Publication
Featured researches published by Tatsuya Yamada.
international ieee vlsi multilevel interconnection conference | 1991
Hiroshi Nishimura; Tatsuya Yamada; S. Ogawa
The authors have developed a reliable submicron via formation technology using Al-Si-Cu high temperature sputter filling with a thin Ti underlayer. Complete filling of a 0.5 mu m diameter via hole with an aspect ratio of 1.6 was achieved. Crystallinity of the aluminum in the via was single crystalline
symposium on vlsi technology | 1992
Hiroshi Nishimura; Tatsuya Yamada; Robert Sinclair; S. Ogawa
A technology using Al-Si-Cu alloy high-temperature sputter filling and a thin Ti underlayer to prevent Si from precipitating is discussed. Complete filling of a 0.15- mu m-diameter via with aspect ratio of 4.5 has been achieved. The resistance of the 0.3- mu m sputter filled via was 0.71 Omega . This is about one order of magnitude lower than that for a conventional via. The electromigration resistance of the 0.3- mu m filled via was found to be four orders of magnitude greater than that of the conventional vias. Superior stress-induced migration resistance of 0.5- mu m wide lines was confirmed.<<ETX>>
Submicrometer Metallization: Challenges, Opportunities, and Limitations | 1993
Hiroshi Nishimura; Takashi Kouzaki; Tatsuya Yamada; Robert Sinclair; S. Ogawa
A highly reliable high-temperature Al-Si-Cu sputter metallization, employing a Ti underlayer to prevent Si from precipitating has been developed, and complete filling of 0.15 micrometers diameter vias with aspect ratio of 4.5 has been achieved. Degree of filling and via chain resistance were improved by increasing the Ti underlayer thickness. This is probably because of improvement in wettability of Al on via sidewall, which is caused by uniform interfacial reaction between Ti underlayers and Al-Si-Cu films. Transmission electron microscopy (TEM) combined with micro energy dispersive spectrometry (EDS) analysis revealed that reacted ball-like precipitates exist at the interface between the first metal and the second metal lines in the filled via, and that the precipitates particles are Al-Ti-Si compounds. No Si precipitation was observed in areas away from or near to the particles. Also, it was found that Al films in the vias consist of one or two single crystalline <111> textured normal to a substrate. The electrical resistance for the 0.3 micrometers sputter filled via was 0.71 (Omega) , which is about one order of magnitude lower than that for a non-filled (conventional) via. The electromigration (EM) resistance of 0.3 micrometers filled vias was found to be four orders of magnitude greater than that for the 0.3 micrometers conventional vias. Furthermore, we confirmed that the EM resistance for the 0.3 micrometers filled via is comparable to the 0.9 micrometers conventional via. Superior EM and stress-induced migration (SM) resistance for the lines have been confirmed.
Archive | 1994
Yoshiaki Kato; Tatsuya Yamada; Mitsuo Yasuhira; 義明 加藤; 光雄 安平; 達也 山田
symposium on vlsi technology | 2006
T. Tomimatsu; Y. Goto; H. Kato; M. Amma; Mitsuhiko Igarashi; Y. Kusakabe; M. Takeuchi; S. Ohbayashi; S. Sakashita; T. Kawahara; M. Mizutani; M. Inoue; M. Sawada; Y. Kawasaki; S. Yamanari; Y. Miyagawa; Y. Takeshima; Yoshiki Yamamoto; S. Endo; T. Hayashi; Y. Nishida; K. Horita; Tomohiro Yamashita; Hidekazu Oda; K. Tsukamoto; Y. Inoue; H. Fujimoto; Y. Sato; Kyoji Yamashita; R. Mitsuhashi
Archive | 1998
Yasuyuki Nakazawa; Tatsuya Yamada; Masato Yokomichi; 康行 中澤; 達也 山田; 正人 横道
Archive | 2007
Tetsuyo Asami; Noriaki Kawasaki; Masaru Nonohara; Nobuo Okamura; Shuzo Shimizu; Tatsuya Yamada; Takashi Yoshida; 吉田 敬; 達也 山田; 信男 岡村; 伯晃 川崎; 哲世 浅見; 修三 清水; 勝 野々原
Archive | 2012
Tatsuya Yamada
Archive | 2005
Kazuhisa Hayakawa; Tatsuya Yamada; 達也 山田; 和寿 早川
Archive | 2001
Tatsuya Yamada; Masato Yokomichi; 達也 山田; 正人 横道