Teik-Chung Tan

Stride based prefetcher with confidence counter and dynamic prefetch-ahead mechanism

Method and system for speculatively invalidating lines in a cache

Method to transfer data in a system with multiple clock domains using clock skipping techniques

Sectored least-recently-used cache replacement

Reorder buffer including a circuit for selecting a designated mask corresponding to an instruction that results in an exception

Using a shuffle unit to implement shift operations in a processor

WAY PREPARATION FOR ACCESSING A CACHE

Method and apparatus to provide fixed latency early response in a system with multiple clock domains with fixable clock ratios

High density dynamic bus routing scheme

Fast hardware divider