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Dive into the research topics where Terry Sych is active.

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Featured researches published by Terry Sych.


international symposium on microarchitecture | 2004

Helper threads via virtual multithreading

Perry H. Wang; Jamison D. Collins; Dongkeun Kim; Bill Greene; Kai-Ming Chan; A.B. Yunus; Terry Sych; Stephen F. Moore; John Paul Shen; Hong Wang

Memory latency dominates the performance of many applications on modern processors, despite advances in caches and prefetching techniques. Numerous prefetching techniques, both in hardware and software, try to alleviate the memory bottleneck. One such technique, known as helper threading improves single-thread performance on a simultaneous multithreaded architecture (SMT), which shares processor resources, including caches, among logical threads. It uses otherwise idle hardware thread contexts to execute speculative threads on behalf of the main thread. Helper threading accelerates a program by exploiting a processors multithreading capability to run assist threads. Based on the helper threading usage model, virtual multithreading (VMT), a form of switch-on-event user-level multithreading, can improve performance for real-world workloads with a wall-clock speedup of 5.0 to 38.5 percent


Archive | 1995

Method and apparatus for interfacing a device compliant to a first bus protocol to an external bus having a second bus protocol and for providing virtual functions through a multi-function intelligent bridge

Byron Gillespie; Marc Goldschmidt; Terry Sych; Bruce Young


architectural support for programming languages and operating systems | 2004

Helper threads via virtual multithreading on an experimental itanium ® 2 processor-based platform

Perry H. Wang; Jamison D. Collins; Hong Wang; Dongkeun Kim; Bill Greene; Kai-Ming Chan; Aamir B. Yunus; Terry Sych; Stephen F. Moore; John Paul Shen


Archive | 1996

A method and apparatus for interfacing a device compliant to first bus protocol to an external bus

Byron Gillespie; Marc Goldschmidt; Terry Sych; Bruce Young


Archive | 2004

Helper Threads via Virtual Multithreading On An Experimental Itanium 2 Machine

Perry H. Wang; James J. Collins; H. Y. Wang; Dong-Sup Kim; Bruce S. Greene; Kai-Ming Chan; A. Yunus; Terry Sych; Jie Shen


Archive | 1996

Intelligente I/O-Schaltung zum Verbinden einer mit einem ersten Busprotokoll kompatiblen Einrichtung mit einem externen Bus

Byron Phoenix Gillespie; Marc Tempe Goldschmidt; Terry Sych; Bruce Young


Archive | 1996

Verfahren und Einrichtung zum Verbinden einer mit einem ersten Busprotokoll kompatiblen Einrichtung mit einem externen Bus

Byron Gillespie; Marc Goldschmidt; Terry Sych; Bruce Young


Archive | 1996

Intelligente I/O-Schaltung zum Verbinden einer mit einem ersten Busprotokoll kompatiblen Einrichtung mit einem externen Bus Intelligent I / O circuit for connecting a bus protocol compatible with a first device to an external bus

Byron Phoenix Gillespie; Marc Tempe Goldschmidt; Terry Sych; Bruce Young


Archive | 1996

Procede et appareil pour interfacer un dispositif conforme au protocole d'un premier bus a un bus externe

Byron Gillespie; Marc Goldschmidt; Terry Sych; Bruce Young


Archive | 1996

Verfahren und Einrichtung zum Verbinden einer mit einem ersten Busprotokoll kompatiblen Einrichtung mit einem externen Bus Method and apparatus for connecting a compatible with a first bus protocol device to an external bus

Byron Gillespie; Marc Goldschmidt; Terry Sych; Bruce Young

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