Byron Gillespie

Method and apparatus for interfacing a device compliant to a first bus protocol to an external bus having a second bus protocol and for providing virtual functions through a multi-function intelligent bridge

In-circuit-emulation event management system

Integrated real-time performance monitoring facility

Programmable PCI interrupt routing mechanism

System for protecting unauthorized memory accesses by comparing base memory address with mask bits and having attribute bits for identifying access operational mode and type

Data processor having integrated boolean and adder logic for accelerating storage and networking applications

System for booting processor from remote memory by preventing host processor from configuring an environment of processor while configuring an interface unit between processor and remote memory

System for protecting memory accesses by comparing the upper and lower bounds addresses and attribute bits identifying unauthorized combinations of type of operation and mode of access

System for creating new group of chain descriptors by updating link value of last descriptor of group and rereading link value of the updating descriptor

Direct memory access controller with interface configured to generate wait states