Tetsuo Takahashi

Atomically Flat 3C-SiC Epilayers by Low Pressure Chemical Vapor Deposition

We have investigated the heteroepitaxial growth of 3C-SiC on Si by low pressure chemical vapor deposition (LPCVD) using a silane-propane-hydrogen reaction gas system. By the growth at low pressure below 10 Torr, several problems arising from atmospheric pressure CVD (APCVD) were solved, namely the growth of protrusions was suppressed and thickness uniformity was improved. Moreover, atomically flat surfaces were obtained. Although the growth temperatures in the case of LPCVD were lower than those in the case of APCVD, LPCVD epilayers showed excellent crystallinity and luminescence properties, comparable with those of APCVD epilayers.

Sub-5 µm Thin Film Crystalline Silicon Solar Cell on Alumina Ceramic Substrate

Thin film crystalline silicon with the thickness of 3-5 µm was formed on a low-cost alumina ceramic substrate using the laser-beam melt and crystallization (LMC) technique. In the LMC process, buffer layers were introduced between the thin film crystalline silicon and the alumina ceramic substrate to enlarge grain sizes, to reduce stress and to prevent unwanted impurity contamination from the substrate. Thin film crystalline silicon solar cells were experimentally fabricated, and one of them showed a conversion efficiency of 5.9%, short-circuit current of 23.3 mA/cm2 and open-circuit voltage of 0.48 V for the silicon film thickness of 4.2 µm.

Influence of stacking faults on the performance of 4H–SiC Schottky barrier diodes fabricated on (112̄0) face

The influence of stacking faults (SFs) on the performance of 4H–SiC (1120) Schottky barrier diodes fabricated on the epilayer grown on the substrate which was grown in [1120] direction by the sublimation method was investigated. The number of SFs under the Schottky electrode was determined by KOH etching of (1100) face cross section. SFs were found to have a severe influence on the leakage current of reverse characteristic and Schottky barrier height. The leakage current is increased even though a few SFs exist under the electrode. The Schottky barrier height is also affected by the SF under the electrode.

Origin of Giant Step Bunching on 4H-SiC (0001) Surfaces

To elucidate the origin of giant step bunching on 4˚ off-axis 4H-SiC (0001) faces, we carried out hydrogen etching and epitaxial growth under various conditions. We found that giant step bunching occurs during hydrogen etching and epitaxial growth at extremely low or high C/Si ratios, i.e., with an excessive supply of SiH4 or C3H8. From these results, we have proposed that the origins of giant step bunching are asymmetry in the step kinetics in etching and Si or C cluster generation on terraces during growth.

The Electrical Characteristics of Metal-Oxide-Semiconductor Field Effect Transistors Fabricated on Cubic Silicon Carbide

The n-channel metal-oxide-semiconductor field effect transistors (MOSFETs) were fabricated on cubic silicon carbide (3C-SiC) epitaxial layers grown on 3C-SiC substrates. The gate oxide of the MOSFETs was formed using pyrogenic oxidation at 1100 ?C. The 3C-SiC MOSFETs showed enhancement type behaviors after annealing at 200 ?C for 30 min in argon atmosphere. The maximum value of the effective channel mobility of the 3C-SiC MOSFETs was 260 cm2/V?s. The leakage current of gate oxide was of a few tens of nA/cm2 at an electric field range below 8.5 MV/cm, and breakdown began around 8.5 MV/cm.

N-channel MOSFETs fabricated on homoepitaxy-grown 3C-SiC films

We present results of the enhancement mode, n-channel 3C-silicon carbide (SiC) MOSFETs fabricated on homoepitaxy 3C-SiC films. The fabricated devices exhibit excellent gate-controlled linear and saturation regimes of operation. The average effective channel mobility is found to be 229 cm/sup 2//Vs. The breakdown field of the gate oxide is observed at be 11 MV/cm and the subthreshold swing is determined to be 280 mV/decade.

In situ Observation of Clusters in Gas Phase during 4H-SiC Epitaxial Growth by Chemical Vapor Deposition Method

We have performed in situ observation of the chemical vapor deposition (CVD) of silicon carbide (SiC), and investigated the relationship between the growth conditions and generation of clusters in the gas phase of the H2–SiH4–C3H8 gas system to realize the high-speed growth of SiC by CVD. It was found that cluster generation can be suppressed by decreasing the partial pressure of the process gases, i.e., increasing the H2 carrier gas flow rate, and decreasing the pressure and process gas flow rate. We concluded that clusters in the gas phase consist of not only Si droplets, but also SiC particles.

High-Temperature Operation of Silicon Carbide MOSFET

High-temperature operation up to 400°C was confirmed for a 3C-type silicon carbide (SiC) MOSFET which was fabricated in an n-type SiC layer epitaxially grown on a silicon (Si) substrate. It was also observed that the transconductance of the MOSFET increased as the ambient temperature increased.

Investigation of antiphase domain annihilation mechanism in 3C–SiC on Si substrates

We have proposed a model in order to explain antiphase domains (APDs) annihilation in 3C–SiC on Si (001) substrates. The models proposed so far have been classified by the planes in which antiphase boundaries (APBs) propagate. We examined these conventional models from the viewpoint of incorrect-bond sequence contained in APB and clarified the correlation between the elongated direction of APBs on initial (001) surfaces and the direction of APBs propagation along growth axis. And then, we tried to decide the suitable incorrect-bond sequence to explain the APDs annihilation in 3C–SiC on Si from the surface morphology at initial growth stage, and confirmed the validity of the model by simulation under the restricted condition of layer-by-layer growth. Next, in order to explain our experimental results, we extended the model by considering the existence of steps on the surfaces and the growth modes, and proposed a model. Finally, we showed the validity of our model by the simulation and demonstrated the capa...

Sub-5 μm thin film c-Si solar cell and optical confinement by diffuse reflective-substrate

Abstract Thin film (4.2 μm) c-Si cell with the superior short-circuit current of 25.5 mA/cm 2 which is comparable to that of cast Si solar cells was realized by the improvement of anti-reflection coating and diffuse reflective-substrate. It was confirmed that this superior short-circuit current characteristics was due to the optical confinement based on internal randomization.