Tetsuyoshi Shiota

Fabrication of high quality Nb/AlO/sub x/-Al/Nb Josephson junctions. I. Sputtered Nb films for junction electrodes

The stress, surface morphology, superconducting characteristics, and crystal structure of sputtered Nb films were evaluated to judge their applicability to Josephson-junction electrodes. The film qualities were compared between Nb films deposited by DC and RF magnetron sputtering. The authors concluded that DC-sputtered Nb films are more suitable for junction electrodes and studied the relationship between their film quality and sputtering parameters. They observed that the Nb film characteristics were determined solely by the cathode voltage during sputtering regardless of the other parameters. The authors discuss the changes in film characteristics during Josephson integrated circuit processing.<<ETX>>

A Sub-

A sub-mus wake-up time power gating technique was developed for low-power SoCs. It uses two types of power switches and a separated power line bypassing rush current to suppress power-supply-voltage fluctuation. We applied this technique to a heterogeneous dual-core microprocessor fabricated in 90 nm CMOS technology. When wake-up time on the 2M-gate scale circuit was set to 0.24 mus , the supply voltage fluctuation was suppressed to 2.5 mV. The area overhead of this technique was less than 1% of the total die area.

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We studied Nb junctions with aluminum nitride, AlNx, tunnel barriers formed by plasma nitridation on aluminum film surfaces. The AlNx barrier junctions show current‐voltage characteristics with leakage currents small enough and critical current densities large enough for use in Josephson digital circuits. The AlNx barrier junction exhibited improved annealing stability as compared to AlOx barrier junctions. For the AlNx barrier junction, decreases in critical current during annealing at 250 °C are remarkably suppressed.

s Wake-Up Time Power Gating Technique With Bypass Power Line for Rush Current Support

A 51.2-GOPS chip multi-processor integrates four 8-way VLIW embedded processors with 1.0 GB/s local-bus direct memory access. This IC completes MPEG2 MP@HL video-stream decoding at 68% of its processor capability without dedicated hardware. The 11.9 mm /spl times/ 10.3 mm chip is fabricated in a 90 nm 9M CMOS process and consumes 5 W at 533 MHz.

Nb Josephson junction with an AlNx barrier made by plasma nitridation

A sub-mus wake-up power gating technique was developed for low power SOCs. It uses two types of power switches and separated power lines bypassing rush current to suppress power supply voltage fluctuations. We applied this technique to a heterogeneous dual-core microprocessor fabricated in 90 nm CMOS technology. When wake-up time on the 2M-gate scale circuit was set to 0.24 mus, the supply voltage fluctuation was suppressed to 2.5 mV.

A 51.2 GOPS 1.0 GB/s-DMA single-chip multi-processor integrating quadruple 8-way VLIW processors

For pt.II see ibid., vol.2, p.84 (1992). Changes in current-voltage characteristics of Nb/AlO/sub /x-Al/Nb Josephson junctions due to annealing are studied. The surface of the Nb counterelectrode was plasma-nitrided to clarify the effects of oxygen diffusing from it. From anodization profiles, it was confirmed that surface nitridation protects the tunneling barrier from oxygen diffusion. Surface nitridation improved the junction stability for long annealing. The decrease in critical current at initial annealing was found to be independent of nitridation. The annealing stability of AlN/sub /x barrier junctions, compared to that of AlO/sub /x barrier junctions, was measured, and it was concluded that the decrease at initial annealing is due to changes in the AlO/sub /x barrier itself.<<ETX>>

A Sub-μs wake-up time power gating technique with bypass power line for rush current support

We developed plasma nitridation for superconducting Nb wiring to improve their annealing stability. Plasma nitridation was observed to be very effective in increasing the critical currents and improve annealing stability. We analyzed the nitride layer formed on the surface of Nb film by plasma nitridation, and found that it prevented oxygen diffusion in Nb. Plasma nitridation is a currently feasible process to improve the reliability of Nb wiring in Josephson circuit.

Fabrication of high quality Nb/AlO/sub /x-Al/Nb Josephson junctions. III. Annealing stability of AlO/sub /x tunneling barriers

An energy-saving system for SOCs using multiple threshold voltage CMOS was developed. It equips process sensors and process-voltage conversion table generated from static timing analysis results, and adjusts. The supply voltage according to die-to-die process variation. We applied this system to an embedded dual-core microprocessor using 90nm triple Threshold voltage CMOS technology. When the microprocessor executes video stream decoding program, 17% power reduction was measured with dies of typical process condition

Plasma nitridation process for superconducting Nb wiring to improve their annealing stability

We improved the annealing stability in superconducting Nb wiring used in Josephson circuits. Nb film was exposed to nitrogen plasma just after sputtering. We measured the critical current of the Nb wiring before and after annealing. Even before annealing, the critical current with nitrogen plasma treatment is 50% higher than that without treatment. The decrease in critical current after annealing is markedly suppressed. We confirmed using secondary‐ion mass spectroscopy profiles that very little oxygen diffuses into Nb films treated using the nitrogen plasma.

Supply Voltage Adjustment Technique for Low Power Consumption and Its Application to SOCs with Multiple Threshold Voltage CMOS

A real-time on-die noise sensor continuously detects up to 100 noise events per second without disturbing processor operations, using a 400kb/s serial interface. The noise sensor uses histogram counters and variable detection windows. The sensor measures periodic and single-events in real time. The noise sensor is implemented in a 90nm CMOS testchip.