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Dive into the research topics where Thomas E. Kazior is active.

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Featured researches published by Thomas E. Kazior.


IEEE Electron Device Letters | 2000

Low noise In/sub 0.32/(AlGa)/sub 0.68/As/In/sub 0.43/Ga/sub 0.57/As metamorphic HEMT on GaAs substrate with 850 mW/mm output power density

C.S. Whelan; W.F. Hoke; R.A. McTaggart; M. Lardizabal; P.S. Lyman; P.F. Marsh; Thomas E. Kazior

A double-pulse-doped InAlGaAs/In/sub 0.43/Ga/sub 0.57/As metamorphic high electron mobility transistor (MHEMT) on a GaAs substrate is demonstrated with state-of-the-art noise and power performance, This 0.15 /spl mu/m T-gate MHEMT exhibits high on- and off-state breakdown (V/sub ds/>6 V and V/sub dg/>13 V, respectively) which allows biasing at V/sub ds/>5 V. The 0.6 mm device shows >27 dBm output power (850 mW/mm) at 35 GHz-the highest reported power density of any MHEMT. Additionally, a smaller gate periphery 2/spl times/50 /spl mu/m (0.1 mm) 43% MHEMT exhibits a F/sub min/=1.18 dB and 10.7 dB associated gain at 25 GHz, and also is the first noise measurement of a -40% In MHEMT. A double recess process with selective etch chemistries provides for high yields.


international microwave symposium | 1990

A high power 2-18 GHz T/R switch

M.J. Schindler; Thomas E. Kazior

A high-power 2-18-GHz T/R (transmit/receive) switch monolithic microwave IC (MMIC) has been developed for use in broadband T/R modules. This switch has a power handling of better than 35 dBm (3.2 W), 8-dB higher than any previously reported broadband switch. A combination of techniques was used to yield higher power handling while preserving low loss and high isolation. These circuit techniques include an asymmetrical design of the transmit and receive arms, the use of dual-gate FETs for handling large voltages, and the use of large FET peripheries for handling large currents. The use of dual-gate FETs in place of a stack of individual FETs reduces the device area, with a resulting reduction in parasitic series inductance through the FET and in shunt capacitance from the FET to ground. Power handling is somewhat lower for the dual-gate FET than for conventional stacked FETs, since RF voltage cannot be distributed as uniformly across the gates. Offstate capacitance is higher for a dual-gate FET than for a stacked FET, since the close proximity of the elements leads to additional parasitic capacitances.<<ETX>>


international conference on indium phosphide and related materials | 2000

GaAs metamorphic HEMT (MHEMT): an attractive alternative to InP HEMTs for high performance low noise and power applications

C.S. Whelan; P.F. Marsh; W.E. Hoke; R.A. McTaggart; C.P. McCarroll; Thomas E. Kazior

Metamorphic HEMTs (MHEMTs) are becoming the device of choice for low cost millimeter-wave applications, where a high indium content channel is necessary for high performance. This paper will review the material properties, the processing, end the device and amplifier performance of metamorphic HEMTs with 30% to 60% indium channel content, with a focus on work done at Raytheon RF Components.


international microwave symposium | 1992

One watt, very high efficiency 10 and 18 GHz pseudomorphic HEMTs fabricated by dry first recess etching

S. Shanfield; A. Platzker; L. Aucoin; Thomas E. Kazior; B.I. Patel; A. Bertrand; W. Hoke; P. Lyman

The authors report 10- and 18-GHz power performance of double recessed 1.2-mm periphery pseudomorphic high electron mobility transistors (PsHEMTs). They have obtained demonstrably better uniformity in performance than conventionally fabricated PsHEMTs. This was accomplished by incorporating a new approach to recess formation using selective reactive ion etching of the first recess in a double recessed structure. The critical first recess was formed with exceptional uniformity using dry etching and an AlGaAs etch stop layer. Simultaneous power, gain, and power-added efficiency, representative of many devices, are summarized.<<ETX>>


compound semiconductor integrated circuit symposium | 2010

High Performance Mixed Signal and RF Circuits Enabled by the Direct Monolithic Heterogeneous Integration of GaN HEMTs and Si CMOS on a Silicon Substrate

Thomas E. Kazior; Jeffrey R. LaRoche; Miguel Urteaga; Joshua Bergman; Myung-Jun Choe; K. J. Lee; T. Seong; M. Seo; A. Yen; D. Lubyshev; Joel M. Fastenau; W. K. Liu; D. Smith; David T. Clark; R. Thompson; Mayank T. Bulsara; Eugene A. Fitzgerald; Charlotte Drazek; E. Guiot

In this work we present recent results on the direct heterogeneous integration of GaN HEMTs and Si CMOS on a silicon substrate. GaN HEMTs whose DC and RF performance are comparable to GaN HEMTs on SiC substrates have been achieved. As a demonstration vehicle we designed and fabricated a GaN amplifier with pMOS gate bias control circuitry (a current mirror) and heterogeneous interconnects. This simple demonstration circuit is a building block for more advanced RF, mixed signal and power conditioning circuits, such as reconfigurable or linearized PAs with in-situ adaptive bias control, high power digital-to-analog converters (DACs), driver stages for on-wafer optoelectronics, and on-chip power distribution networks.


Microelectronics Reliability | 2002

Reliability of metamorphic HEMTs on GaAs substrates

P.F. Marsh; C.S. Whelan; William E. Hoke; R.E. Leoni; Thomas E. Kazior

Abstract Metamorphic HEMT (MHEMT) technology enables the growth of high indium content channels on GaAs substrates, giving them the performance of InP HEMTs. MHEMT growth techniques use a graded alloy composition buffer layer structure, permitting channel indium contents exceeding 25% without strain. Potential applications include 40 Gb/s fiber optic receivers as well as LNAs for local multipoint distribution systems and satellite communications. Many such applications place stringent requirements on reliability with Belcore standards requiring 106 h median time to failure (MTTF) at 125 °C for power devices. Satellite applications require a LNA projected failure-free service of 15–30 years, implying approximately 107 h MTTF, at 85 °C. Naturally, one will ask “Is MHEMT technology reliable?” From the results of our ongoing work, we show that MHEMT reliability is similar to that of InP HEMTs with ∼106 h MTTF at 125 °C.


international microwave symposium | 1999

Low noise metamorphic HEMT devices and amplifiers on GaAs substrates

P.F. Marsh; S.L.G. Chu; S.M. Lardizabal; R.E. Leoni; S. Kang; R. Wohlert; A.M. Bowlby; William E. Hoke; R.A. McTaggart; C.S. Whelan; P.J. Lemonias; P.M. McIntosh; Thomas E. Kazior

Excellent noise (0.41 dB minimum noise figure with 11.5 dB associated gain at 18 GHz) and linearity (third order intercept point of 37.6 dBm at 42.5 mW DC power giving a linearity figure of merit (LFOM) of 137) have been obtained for InAlAs-InGaAs metamorphic HEMTs on a GaAs substrate. These devices have been used to design and fabricate microwave and millimeter wave amplifiers. Amplifier results are presented.


ieee gallium arsenide integrated circuit symposium | 2001

A DC-45 GHz metamorphic HEMT traveling wave amplifier

R.E. Leoni; S.J. Lichwala; J.G. Hunt; C.S. Whelan; P.F. Marsh; William E. Hoke; Thomas E. Kazior

Metamorphic HEMT (MHEMT) technology is capable of providing InP based HEMT performance at GaAs based HEMT levels of manufacturability and cost. This makes the MHEMT an attractive alternative for low noise, high frequency, and wide bandwidth applications. The authors describe the performance of a DC-45 GHz MHEMT traveling wave amplifier (TWA) that is well suited for broadband applications such as 40 Gb/s fiber-optic receivers. The amplifier provides a typical noise figure of 2 dB and output powers in excess of 3 dBm.


international microwave symposium | 1990

A single chip 2.20 GHz T/R module

M.J. Schindler; S.L.G. Chu; Thomas E. Kazior; A. Bertrand; K.M. Simon

A single chip 2-20-GHz transmit/receive (T/R) module has been demonstrated. This MMIC (monolithic microwave integrated circuit) included a four-stage power amplifier chain, a four-stage low-noise amplifier chain, and two T/R switches. A selective ion implantation process was used. One implant profile was optimized for low-noise operation, and a second was optimized for power performance. All circuits were designed to be relatively insensitive to process variations to ensure adequate yield, despite the complexity of the chip. Distributed amplifiers were used throughout, and the T/R switches used a standard series-shunt FET configuration. All circuits were miniaturized to keep the total chip size small. The entire T/R is only 0.143 in*0.193 in (3.6 mm*4.9 mm).<<ETX>>


Journal of Vacuum Science & Technology B | 1997

High rate CH4:H2 plasma etch processes for InP

C.S. Whelan; Thomas E. Kazior; Katerina Y. Hur

High rate plasma etch processes for InP with smooth etched surfaces and highly anisotropic sidewall profiles were developed. A CH4:H2-based process using an electron cyclotron resonance (ECR) etcher and a reactive ion etcher (RIE) was investigated. Etch rates in excess of 120 nm/min in an ECR etcher using CH4:H2:Ar plasma and 135 nm/min in a RIE using CH4:H2:O2 were achieved in InP and produced minimal surface roughness. These etch rates are significantly faster than those previously reported.

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Miguel Urteaga

University of California

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Mayank T. Bulsara

Massachusetts Institute of Technology

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