Thomas E. Nohava

Visible-Blind UV Digital Camera Based On a 32 × 32 Array of GaN/AlGaN p-i-n Photodiodes

A visible-blind UV camera based on a 32 × 32 array of backside-illuminated GaN/AlGaN p-i-n photodiodes has been successfully demonstrated. Each of the 1024 photodiodes in the array consists of a base n-type layer of AlGaN (~20%) onto which an undoped GaN layer followed by a p-type GaN layer is deposited by metallorganic vapor phase epitaxy. Double-side polished sapphire wafers are used as transparent substrates. Standard photolithographic, etching, and metallization procedures were employed to obtain fully-processed devices. The photodiode array was hybridized to a silicon readout integrated circuit using In bump bonds. Output from the UV camera was recorded at room temperature at a frame rate of 30 Hz. This new type of visible-blind digital camera is sensitive to radiation from 320 nm to 365 nm in the UV spectral region.

Quantum-well p-channel AlGaAs/InGaAs/GaAs heterostructure insulated-gate field-effect transistors with very high transconductance

Quantum-well p-channel pseudomorphic AlGaAs/InGaAs/GaAs heterostructure insulated-gate field-effect transistors with enhanced hole mobility are described. The devices exhibit room-temperature transconductance, transconductance parameter, and maximum drain current as high as 113 mS/mm, 305 mS/V/mm, and 94 mA/mm, respectively, in 0.8- mu m-gate devices. Transconductance, transconductance parameter, and maximum drain current as high as 175 mS/mm, 800 mS/V/mm, and 180 mA/mm, respectively were obtained in 1- mu m p-channel devices at 77 K. From the device data hole field-effect mobilities of 860 cm/sup 2//V-s at 300 K and 2815 cm/sup 2//V-s at 77 K have been deduced. The gate current causes the transconductance to drop (and even to change sign) at large voltage swings. Further improvement of the device characteristics may be obtained by minimizing the gate current. To this end, a type of device structure called the dipole heterostructure insulated-gate field-effect transistor is proposed.<<ETX>>

Quantum-well p-channel AlGaAs/InGaAs/GaAs heterostructure insulated-gate field-effect transistors

The authors report experimental and theoretical results for self-aligned gate quantum-well p-channel pseudomorphic GaAs/InGaAs/AlGaAs heterostructure insulated-gate field-effect transistors (HIGFETs). High transconductances and transconductance parameters, 113 mS/mm and 305 mS/mm/V at room temperature for 0.8- mu m gate length, are reported. The authors discuss the effects of built-in strain on the valence bands, analyze the device data on the gate length dependence of the device parameters, and discuss the subthreshold characteristics and evidence for implant straggle. They also show the importance of the gate current for the device characteristics and propose to reduce the gate current and thus to increase the voltage swing by fabricating p-channel devices with p-doped InGaAs channels and n/sup +/ AlGaAs gates on the insulating AlGaAs layer. >

UV-Specific (320-365 nm) Digital Camera Based On a 128×128 Focal Plane Array of GaN/AlGaN p-i-n Photodiodes

An ultraviolet-specific (320-365 nm) digital camera based on a 128×128 array of backside-illuminated GaN/AlGaN p-i-n photodiodes has been successfully developed. The diode structure consists of a base n-type layer of AlGaN (~23% Al) followed by undoped and then p-type GaN layers deposited by metal organic vapor phase epitaxy. Double-side polished sapphire wafers serve as transparent substrates. Standard photolithographic, etching, and metallization procedures were employed to fabricate the devices. The fully-processed photodiode array was hybridized to a silicon readout integrated circuit (ROIC) using In bump bonds for electrical contact. The UV camera was operated at room temperature at frame rates ranging from 15 to 240 Hz. A variety of UV scenes were successfully recorded with this configuration.

A 4 kbit synchronous static random access memory based upon delta-doped complementary heterostructure insulated gate field effect transistor technology

Delta-doped pseudomorphic In/sub y/Ga/sub 1-y/As channel complementary heterostructure insulated gate field effect transistor (C-HIGFET) technology has been developed for LSI complementary circuits which exhibit extremely low power dissipation while maintaining the high-speed operation characteristic of III-V heterostructure FETs. Using C-HIGFET ring oscillators with 1 mu m gate lengths, a gate delay of 206 ps was obtained with a gate standby power of only 3.96 mu W/gate and a switching-power-delay product of 145 fJ/gate. The authors have also fabricated fully functional 1 K*4 static random access memories (SRAMs) using this delta-doped C-HIGFET technology. The synchronous 1 K*4 SRAMs operate at a clock frequency of 284 MHz with a total power dissipation of only 183 mW.<<ETX>>

Complementary III-V heterostructure FETs for low power integrated circuits

The authors report on a complementary III-V heterostructure FET (HFET) technology that makes use of high AlAs mole fraction (Al,Ga)As barrier layers to reduce the gate leakage currents of n- and p-channel heterostructure FETs. The subthreshold currents and drain-to-gate leakage currents of p-HFETs are also substantially reduced as a result of the high AlAs mole fraction (AlGa)As barrier layer. A 1024*1 bit complementary HFET SRAM with access times as low as 4.6 ns and power dissipation of 34.8 mW has also been demonstrated using this technology.<<ETX>>

Development of static random access memories using complementary heterostructure insulated gate field effect transistor technology

A complementary heterostructure insulated gate field effect transistor (c-HIGFET) technology has been developed which is capable of operating at high speeds with very low static power dissipation. Ring oscillator circuits fabricated using this 1 mu m gate length C-HIGFET technology exhibited very low power dissipation values of down to 67 mu W/gate while maintaining gate delays of approximately 200 ps. In addition, speed-power products of less than 6 fJ have been obtained using these C-HIGFET ring oscillators. The C-HIGFET technology has been used to fabricate 1 kb static random access memories (SRAMs) with yields of over 26% on a 3-inch wafer. Read access times as low as 1.8 ns were obtained for 1 K SRAMs at a power of 650 mW. The 1 K SRAM exhibited a significant reduction in power to 90 mW at a somewhat longer read access time of 4.4 ns.<<ETX>>

Doped channel pseudomorphic GaAs/InGaAs/AlGaAs hetero-structure FETs

We report experimental and theoretical results obtained for pseudomorphic InGaAs Doped Channel Heterostructure FETs (DCHFET) that demonstrate the advantages of this device over other heterostructure FETs. We demonstrate high transconductance beta value, and saturation current and low output conductance and subthreshold current. These improvements are due to a higher density of carriers in the channel, the carrier confinement in the quantum well device structure, and the superior transport properties of InGaAs. Transconductances of 350 mS/mm and beta-values of 440 mS/V-mm were measured for 1-µm enhancement mode DCHFETs. Transconductances as high as 471 mS/mm and drain saturation currents as high as 660 mA/mm were measured for 0.6 µm depletion mode DCHFETs.

A self-aligned gate III-V heterostructure FET process for ultrahigh-speed digital and mixed analog/digital LSI/VLSI circuits

A planar ion-implanted self-aligned gate process for the fabrication of high-speed digital and mixed analog/digital LSI/VLSI integrated circuits is reported. A 4-b analog-to-digital converter, a 2500-gate 8*8 multiplier/accumulator, and a 4500-gate 16*16 complex multiplier have been demonstrated using enhancement-mode n/sup +/-(Al,Ga)As/MODFETs, superlattice MODFETs, and doped channel heterostructure field-effect transistors (FETs) whose epitaxial layers were grown by molecular-beam epitaxy. With nominal 1- mu m gate-length devices, direct-coupled FET logic ring oscillators with realistic circuit structures have propagation delays of 30 ps/stage at a power dissipation of 1.2 mW/stage. In LSI circuit operation, these gates have delays of 89 ps/gate at a power dissipation of 1.38 mW/gate when loaded with an average fan-out of 2.5 gates and about 1000 mu m of high-density interconnects. High-performance voltage comparator circuits operated at sampling rates greater than 2.5 GHz at Nyquist analog input rates and with static hysteresis of less than 1 mV at room temperature. Fully functional 4-b analog-to-digital circuits operating at frequencies up to 2 GHz were obtained. >

Electron velocity saturation in heterostructure field-effect transistors

Results on gate-length scaling of the performance of enhancement-mode heterostructure field-effect transistors (HFETs) for gate lengths of between 0.4 and 10 mu m are reported. The devices studied were fabricated by a self-aligned gate process. Transconductances as large as 534 mS/mm were achieved with 0.4- mu m devices. Two types of pseudomorphic AlGaAs/InGaAs/GaAs heterostructure are compared. One of them is used for modulation-doped FETs and the other for doped-channel FETs. It is found that the effects of electron velocity saturation are different for the two types of device due to the dominance of charge transfer and gate leakage in the conventional modulation-doped device. The experimental results are explained in the framework of a simple charge control model. >