Thomas Guillod

10kV SiC-based isolated DC-DC converter for medium voltage-connected Solid-State Transformers

Silicon-carbide semiconductor technology offers the possibility to synthesize power devices with unprecedented blocking voltage capabilities while achieving outstanding switching and conduction performances. Accordingly, this new semiconductor technology is especially interesting for Solid-State Transformer concepts and is utilized in this paper for designing a 25 kW/50 kHz prototype based on 10 kV SiC devices, featuring a 400V DC output. The focus is on the DC-DC converter stage while special attention is placed on the large step-down medium frequency transformer, whereby the impact of the rather high operating frequency and high number of turns with respect to the transformers resonance frequency is analyzed This leads to useful scaling laws for the resonance frequency of transformers in dependence of the operating frequency and construction parameters. Finally, a transformer prototype and efficiency and power density values for the DC-DC stage are presented.

Improved Coupled Ion-Flow Field Calculation Method for AC/DC Hybrid Overhead Power Lines

The conversion of multicircuit ac transmission lines to hybrid ac/dc lines is a promising way of substantially increasing transmission capacities in areas where it is difficult to obtain new rights of way. Critical questions related to such a conversion include the impact on the electric fields and ion currents at the ground level, as well as the dc current coupling into the ac phases. In this paper, a new procedure based on the method of characteristics is proposed for solving the fully coupled ion-flow problem. The method does not make the Deutsch assumption and is fast and stable even for high assumed wind speeds. A hybrid tower is simulated with different voltages and wind speeds. The results show the influence of the onset gradient, the dc line voltage, and the wind speed on the current coupling as well as the electric field and ion current density at the ground level. It is shown that the new proposed method can serve as the tool for dimensioning real hybrid towers.

Gate Unit With Improved Short-Circuit Detection and Turn-Off Capability for 4.5-kV Press-Pack IGBTs Operated at 4-kA Pulse Current

This paper presents a gate unit with short-circuit protection for a 4.5-kV press-pack insulated gate bipolar transistor (IGBT) designed for pulsed applications and operated at a pulse current of 4 kA and the results of short-circuit tests performed with the mentioned switch and the gate unit. Initially, an overview of the gate unit, the implemented gate boosting as well as the two-stage turn-off and active clamping is given. An over- di/dt as well as an over-current detection using a printed circuit board (PCB) Rogowski coil is used in the gate drive to protect the IGBT during operation. Then, the design of the PCB Rogowski coil is introduced including partial element equivalent circuit simulations to predict the coil parameters. Measurements were made to verify these simulations. Afterward, two types of short-circuit tests were performed. First, the over- di/dt detection was tested by turn-on into a short circuit. The tests show that the over- di/dt detection reacts very fast. The IGBT was always able to turn off the short-circuit current. The maximum short-circuit current was 4.4 kA. Second, tests using an auxiliary switch were made to investigate the short-circuit events during pulse top. The IGBT was able to turn off a maximum short-circuit current of 8.7 kA.

IGBT gate-drive with PCB Rogowski coil for improved short circuit detection and current turn-off capability

In this paper, a gate drive using gate boosting and double-stage turn off including voltage clamping as well as with detection of overcurrent and a too high di/dt during turn on is discussed in detail. Besides the gate drive, also the design of a PCB-Rogowski coil, which is used for measuring currents and for di/dt detection, is explained and different designs are compared. The presented coil has a bandwidth of more than 28MHz and a propagation delay of 11 ns.

Protection of MV/LV solid-state transformers in the distribution grid

Solid-State Transformers (SSTs) are a promising technology since they combine a high efficiency with the integration of new functionalities and services in the grid. A SST establishes the interface between a MV AC three-phase grid and a LV AC or DC grid. For this reason a SST is subject to electrical stresses due to faults occurring in the grid. The MV and LV grids are in return exposed to failures of the SSTs. Therefore, a suitable design of the SST and its corresponding protection devices has to be found. This paper identifies the different stresses which are relevant for a SST, analyzes the protection mechanisms which are currently used for low-frequency transformers and proposes adapted protection schemes for SSTs. MV short circuits and overvoltages are identified as the most critical stresses and are analyzed in detail. Finally, some guidelines are extracted for designing a robust SST.

Protection of MV Converters in the Grid: The Case of MV/LV Solid-State Transformers

Solid-state transformers (SSTs) are a promising technology as they provide new functionalities and services enabling future smart grids. An SST establishes the interface between an MV ac grid and an LV (ac or dc) grid or load. The SST must provide high reliability even in the event of certain grid faults, where the SST is subject to exceptional electrical stresses. In addition, the MV and LV grids are exposed to failures of the SSTs. Spurred by such challenging requirements, this paper defines the different relevant stresses, identifies the corresponding protection needs, and proposes adequate protection circuitries and devices. The protection mechanisms that are currently used for low-frequency transformers are analyzed and an adapted version is proposed for SSTs. MV short circuits and overvoltages are identified as the most critical situations and are analyzed in detail. From the presented in-depth investigation, guidelines are extracted for designing robust SSTs and are applied to a 1 MVA, 10 kV SST.

Computation and analysis of dielectric losses in MV power electronic converter insulation

The newly available Medium Voltage (MV) Silicon-Carbide (SiC) devices enable a great extension of the design space of MV inverters. This includes the utilization of unprecedented blocking voltages, higher switching frequencies, higher commutation speeds, and high temperature operation. However, all these factors considerably increase the insulation stress. This paper details the computation of dielectric losses, which are directly related to the insulation stress and can be used for the insulation design and diagnostic. After a review of the method used to compute dielectric losses, scalable analytical expressions are derived for the losses produced by PWM waveforms of DC-DC, DC-AC, and multilevel DC-AC inverters. Finally, a Medium-Frequency (MF) transformer is analyzed and the impacts of the insulation material and the operating temperature on the dielectric losses are discussed. It is found that the insulation losses can represent a significant share (17%) of the total transformer losses.

Litz wire losses: Effects of twisting imperfections

High-Frequency (HF) litz wires are extensively used for the windings of Medium-Frequency (MF) magnetic components in order to reduce the impact of eddy current losses that originate from skin and proximity effects. Literature documents different methods to calculate eddy current losses in HF litz wires, however, most of the computation methods rely on perfect twisting of the strands, which is often not present in practice. This paper analyzes the implications of imperfect twisting on the current distribution among the different strands of HF litz wires and the corresponding losses by means of a fast 2.5D PEEC (Partial Element Equivalent Circuit) method. The effects of different types of twisting imperfections (at the bundle-, sub-bundle-, or strand-level) are examined. It is found that imperfect twisting can lead to increased losses (more than 100 %). However, perfect twisting of the strands, which is difficult to achieve, is often not required, i.e. suboptimal twisting is sufficient. Analytical expressions are given for distinguishing between critical and uncritical imperfections. The experimental results, conducted with a 7.5kHz/65kW transformer, reveal a reduction of the error on the predicted losses from 52 % (ideal HF litz wire model) to 8 % (presented model) and, thus, confirm the accuracy improvement achieved with the proposed approach.

Electrical shielding of MV/MF transformers subjected to high dv/dt PWM voltages

The introduction of Medium-Voltage (MV) Silicon-Carbide (SiC) devices enables the usage of higher power converter operating voltages, switching frequencies, and commutation speeds. This implies that Medium-Frequency (MF) and High-Frequency (HF) transients are applied to passive components, and particularly to inductors and transformers. Together with the operation at medium voltage, this leads to challenging situations with respect to Common-Mode (CM) currents, parasitic resonances, insulation coordination, and EMI. The electrical field is the key parameter for the aforementioned effects. Therefore, this paper analyzes the electric field distribution (in the insulation, at the surface, and in the air) for a ±3.5kV/±400V, 50kHz, 25kW MV/MF transformer employed in a Solid-State Transformer (SST) demonstrator. For reducing the field, a suitable shield is designed. It is found that the shield drastically reduces the field at the surface of the transformer and in the air without increasing the losses.