Thor Eusner

Controlling Scratching in Cu Chemical Mechanical Planarization

In the manufacture of advanced semiconductor devices, undesirable scratches are produced during such fine-scale material removal processes as chemical mechanical planarization (CMP). In this paper, the upper bound loads for scratching in CMP at single-particle contacts are estimated and validated by atomic force microscope experiments on thin, homogeneous coatings. The upper limits for the scratch width and depth are estimated and validated by polishing experiments. For a Cu surface polished on a Rohm and Haas IC1000 pad with Al 2 O 3 or SiO 2 abrasives, the maximum scratch width is about one-half of the abrasive particle diameter.

Tribological defects in planar nanomanufacturing processes

In the manufacture of advanced semiconductor devices and MEMS, undesirable scratches are produced during such planar nanomanufacturing processes as chemical-mechanical polishing (CMP). In this paper, the upper-bound loads for scratching in CMP at single-particle contacts are estimated and validated by AFM experiments on both homogeneous and composite coatings. Additionally, the upper limits for the scratch width and depth are estimated. For a Cu surface, the maximum scratch width is about one-half and for a Cu/SiO2 composite, it is about one-fifth of the abrasive particle diameter.