Paul B. Fischer

How to reduce power in 3D IC designs: A case study with OpenSPARC T2 core

Low power is considered by many as the driving force for 3D ICs, yet there have been few thorough design studies on how to reduce power in 3D ICs. In this paper, we discuss design methodologies to reduce power consumption in 3D IC designs using a commercial-grade CPU core (OpenSPARC T2 core). To demonstrate power benefits in 3D ICs, four design techniques are explored: (1) 3D floorplanning, (2) metal layer usage control for intra-block-level routing, (3) dual-Vth design, and (4) functional unit block (FUB) folding. With aforementioned methods combined, our 2-tier 3D designs provide up to 52.3% reduced footprint, 25.5% shorter wirelength, 30.2% decreased buffer cell count, and 21.2% power reduction over the 2D counterpart under the same performance.

Chemically induced defects during copper polish

A high yielding copper damascene process requires defect-free copper surfaces after Cu polish. Critical defects derive from corrosion processes such as pitting corrosion, galvanic corrosion and excess etching. Changes in process conditions for Cu polish as well as the interaction with Ta polish step in a two-step (Cu/Ta) Ta polish can assist in defect reduction. Since these corrosion defects derive from the slurry chemistry itself, their quantities can be significantly reduced but not eliminated with process module changes.

Controlling Scratching in Cu Chemical Mechanical Planarization

In the manufacture of advanced semiconductor devices, undesirable scratches are produced during such fine-scale material removal processes as chemical mechanical planarization (CMP). In this paper, the upper bound loads for scratching in CMP at single-particle contacts are estimated and validated by atomic force microscope experiments on thin, homogeneous coatings. The upper limits for the scratch width and depth are estimated and validated by polishing experiments. For a Cu surface polished on a Rohm and Haas IC1000 pad with Al 2 O 3 or SiO 2 abrasives, the maximum scratch width is about one-half of the abrasive particle diameter.

Long wavelength roughness optimization during thin Cu film electropolish

Recent studies of Cu electropolish indicate planarization is not possible due to a large diffusion layer thickness relative to a small post-electroplate step height and small Cu overburden available for electropolish. Assuming an integration scheme that includes a CMP step followed by electropolish, the subsequent challenge of maintaining surface roughness over 300 μm range while electropolishing thin Cu films is addressed by optimizing applied current. For a typical electropolish solution of 6.4 M H 3 PO 4 , 5.4 M glycerin and 17.5 M H 2 O, an rms value of 38 A, comparable to the incoming post-CMP wafers, is demonstrated for 2500 A Cu removal.

The critical role of the metal / porous low-k interface in post direct CMP defectivity generation and resulting ULK surface and bulk hydrophilisation

Surface hydrophilisation of pristine low-k (ULK) is known as a CMP-induced damage mechanism. This phenomenon already enhanced by several factors (e.g. mechanical polishing action, solid content in the slurry, pH of the slurry solution, presence of organic residues, etc ...) extends to bulk hydrophilisation when polishing metal/ULK systems. The degree of bulk hydrophilisation depends on the nature of the selected metal/low-k combination, the metal being either a hard mask (for low damage patterning purposes) or a Cu diffusion barrier. The phenomenon is more or less pronounced depending on the nature of the overlaying metal film (Ta>TaN>Ti>TiN). It also correlates with the post CMP defects generation and more specifically with the presence of scratches with depths ranging from ~178 nm down to ~6 nm as measured with a 0.19 mum tip depending on the metallic layer. These scratches can be reduced in number and depth by overpolishing leading thereby to reduced hydrophilicity. Besides selecting properly the overlaying metal film, UV curing the ULK for mechanical properties improvement and/or engineering the metal/ULK interface by inserting an ultra-thin dielectric layer with higher mechanical properties to prevent the metal from contacting the low-k surface significantly limits the direct CMP-induced bulk hydrophylisation.

Endpoint Detection in Cu-CMP Detection of Ta Layer to Low- k Layer Transition Using Fluorescence

Introduction of low-dielectric constant (k) materials, replacing silicon dioxide, has reduced the time delay (RC delay) and enhanced the performance of integrated circuits (IC) significantly. The two most common ways of depositing these low-k materials are spin-on and chemical vapor deposition. Chemical-vapor-deposited low-k materials use an organic precursor consisting of carbon, hydrogen, and oxygen as the main constituents. Some of these precursors yield a significantly large fluorescence signal when irradiated with an appropriate laser. This signal can be successfully utilized to detect the transition from the barrier layer to dielectric layer in chemical mechanical polishing, which is now typically done using reflectivity measurements in the industry. In this work, sensitivity of the fluorescence technique in detecting the transition is demonstrated and compared with the conventional reflectivity method. An abrasion cell integrated with a spectrometer was used to make the measurements. Capabilities and limitations of the fluorescence techniques are discussed.

Applications of Raman spectroscopy in copper chemical mechanical planarization: In situ detection of tantalum layer to dielectric layer transition

In metal chemical mechanical planarization, in situ detection of barrier to dielectric layer transition is typically done using reflectivity measurements. Introduction of carbon containing low-dielectric constant (k) materials, commonly known as carbon doped oxides (CDOs), as dielectric layers has opened up the possibility of using spectroscopic techniques for detecting such transition. The vibrational frequencies of the bonds between C, H, O, and Si in these low-k materials may be readily detected by spectroscopic techniques such as Raman and infrared spectroscopies. In this work, the use of Raman spectroscopy in detecting the transition from Ta layer to a CDO layer has been explored. An abrasion cell integrated with a Raman spectrometer was used to make the measurements. The sensitivity of the Raman technique is compared with that of the conventional reflectivity technique.

Feasibility of Detecting Barrier Layer to Low-k Transition in Copper Cmp Using Raman Spectroscopy

In copper CMP, transitions from copper to barrier as well as barrier to dielectric layer are typically sensed in situ using an optical reflectance technique. Spectroscopic techniques such as Raman, which allow monitoring the vibrational modes of silicon and low-k layers, have interesting potential for detecting these transitions. In this paper the use of Raman spectroscopy in detecting in situ removal of barrier layers from CDO materials is reported. Intensities of Raman peaks characteristic of Si-Si vibrations from Si substrate and C-H vibrations from low-k materials have been used for monitoring CDO layer thickness and detecting removal of Ta overlayer. An abrasion cell is integrated with a Raman spectrometer to demonstrate the feasibility of Raman monitoring in-situ . Capabilities and limitations of the Raman spectroscopic method are discussed.