Tien-Ke Huang

A Bit-Stuffing Algorithm for Crosstalk Avoidance in High Speed Switching

Motivated by the design of high speed switching fabrics, in this paper we propose a \emph{bit-stuffing} algorithm for generating forbidden transition codes to mitigate the crosstalk effect between adjacent wires in long on-chip buses. We first model a bus with forbidden transition constraints as a forbidden transition channel, and derive the Shannon capacity of such a channel. Then we perform a worst case analysis and a probabilistic analysis for the bit-stuffing algorithm. We show by both theoretic analysis and simulations that the coding rate of the bit stuffing encoding scheme for independent and identically distributed (i.i.d.) Bernoulli input traffic is quite close to the Shannon capacity, and hence is much better than those of the existing forbidden transition codes in the literature, including the Fibonacci representation.

Constructions of Memoryless Crosstalk Avoidance Codes Via

One of the main problems in deep submicrometer designs of high speed buses is the propagation delay due to the crosstalk effect. To alleviate the crosstalk effect, there are several types of crosstalk avoidance codes proposed in the literature. In this paper, we develop explicit constructions of two types of memoryless crosstalk avoidance codes: 1) forbidden overlap codes (FOCs) and 2) forbidden transition codes (FTCs). Our constructions for both FOCs and FTCs have the largest set of codewords. To the best of our knowledge, this is the first explicit construction of a FOC that has the largest set of codewords. Our approach is based on the C-transform developed for routing optical packets in optical queues. We show such an approach can also be used for constructing limited-weight no adjacent transition codes.

{\cal C}

One of the main problems in deep submicron designs of high-speed buses is propagation delay due to the crosstalk effect. To alleviate the crosstalk effect, there are several types of crosstalk avoidance codes proposed in the literature. In this article, we analyze the coding rates of forbidden overlap codes (FOCs) that avoid “010 → 101” transition and “101 → 010” transition on any three adjacent wires in a bus. We first compute the maximum achievable coding rate of FOCs and the maximum coding rate of memoryless FOCs. Our numerical results show that there is a significant gap between the maximum coding rate of memoryless FOCs and the maximum achievable rate. We then analyze the coding rates of FOCs generated from the bit-stuffing algorithm. Our worst-case analysis yields a tight lower bound of the coding rate of the bit-stuffing algorithm. Under the assumption of Bernoulli inputs, we use a Markov chain model to compute the coding rate of a bus with n wires under the bit-stuffing algorithm. The main difficulty of solving such a Markov chain model is that the number of states grows exponentially with respect to the number of wires n. To tackle the problem of the curse of dimensionality, we derive an approximate analysis that leads to a recursive closed-form formula for the coding rate over the nth wire. Our approximations match extremely well with the numerical results from solving the original Markov chain for n ⩽ 10 and the simulation results for n ⩽ 3000. Our analysis of coding rates of FOCs could be helpful in understanding the trade-off between propagation delay and coding rate among various crosstalk avoidance codes in the literature. In comparison with the forbidden transition codes (FTCs) that have shorter propagation delay than that of FOCs, our numerical results show that the coding rates of FOCs are much higher than those of FTCs.

-Transform

The crosstalk effect is one of the main problems in deep sub-micron designs of high-speed buses. To mitigate the crosstalk effect, there are several types of crosstalk avoidance codes proposed in the literature. In this paper, we are particularly interested in generating forbidden transition codes that do not have opposite transitions on any two adjacent wires. For this, we propose a sequential bit-stuffing algorithm and a parallel bit-stuffing algorithm. For the sequential bit-stuffing algorithm, we perform a worst-case analysis and a probabilistic analysis. We show by both theoretic analysis and simulations that the coding rate of the sequential bit-stuffing encoding scheme is quite close to the Shannon capacity. In particular, for a bus with

Coding Rate Analysis of Forbidden Overlap Codes in High-Speed Buses

n=10

Bit-Stuffing Algorithms for Crosstalk Avoidance in High-Speed Switching

parallel wires, the difference is only 2.2 percent. Using a Markov chain analysis, we show that the coding rate of the parallel bit-stuffing algorithm is only slightly lower than that of the sequential bit-stuffing algorithm. The implementation complexity of the parallel bit-stuffing algorithm is linear with

New Upper and Lower Bounds on Exponentially Weighted Average Length of Optimal Binary Prefix Codes

n

New Bounds on the Expected Length of Optimal One-to-One Codes

. In comparison with the existing forbidden transition codes that use the Fibonacci representation in the literature, our bit-stuffing algorithms not only achieve higher coding rates but also have much lower implementation complexity.

Bit-stuffing method for crosstalk avoidance in high-speed buses

In this paper, we consider the exponentially weighted average codeword length introduced by Campbell as a performance measure for source codes. This criterion assumes that the cost is an exponential function of the codeword length and includes the usual expected codeword length criterion as a special case. Such situations could arise when the cost for encoding and decoding is significant, or if the buffer overflow caused by long codewords is a serious issue. Under Campbells average codeword length criterion, we derive new upper and lower bounds on the exponentiated expected length of optimal binary prefix codes when partial information about the source symbol probabilities is available