Tobias Georg Tolle
Philips
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Publication
Featured researches published by Tobias Georg Tolle.
applied power electronics conference | 2003
Tony López; Georg Sauerlaender; Thomas Duerbaum; Tobias Georg Tolle
Gate drivers generate significant losses, especially at high frequencies. While conventional solutions dissipate all the energy, resonant gate drivers partly recover it. A resonant gate driver is studied in detail with the emphasis on PWM operation. Compared to other resonant drivers, the investigated driver combines simplicity, fast switching and loss reduction. Advantages and limits are discussed using a mathematical model and a prototype.
ieee annual conference on power electronics specialist | 2003
Tobias Georg Tolle; Thomas Duerbaum; Reinhold Elferich
For the synchronous buck converter used in VRM applications, one major contributor to switching losses is reverse recovery. These losses however cannot directly be measured because capacitive current and several other phenomena superimpose the mere reverse recovery. The paper describes how to calculate the capacitive part of the drain current and how to de-embed the channel current out of the total drain current. This can show the size of Q/sub rr/ and reveal effects such as gate bouncing and avalanche breakdown.
applied power electronics conference | 2003
Tobias Georg Tolle; Thomas Duerbaum; Reinhold Elferich
For the synchronous buck converter used in VRM applications, one major contributor to switching losses is reverse recovery. These losses however cannot directly be measured because capacitive current and several other phenomena superimpose the mere reverse recovery. The paper describes how calculate the capacitive part of the drain current and how to de-embed the channel current out of the total drain current. This can show the size of Q/sub rr/ and reveal effects such as gate bouncing and avalanche breakdown.
applied power electronics conference | 2004
Toni Lopez; Thomas Duerbaum; Tobias Georg Tolle; Reinhold Elferich
This paper presents a time domain measurement method to estimate the parasitic inductance of a Printed Circuit Board (PCB) layout. It is based on a lumped element model. The proposed measurement technique is also used for measuring the Equivalent Series Inductance (ESL) of devices such as low ohmic MOSFETs and high current shunt resistors. The PCB layout of a half bridge circuit is characterised as an application example.
Archive | 2006
Tobias Georg Tolle; Eberhard Waffenschmidt
Archive | 2004
Tobias Georg Tolle; Thomas Dürbaum; George Sauerlander; Toni Lopez
Archive | 2003
Tobias Georg Tolle; Thomas Dürbaum; Reinhold Elferich
Archive | 2007
Tobias Georg Tolle; Ludo Valere Maurice Schreel; Carsten Deppe
Archive | 2004
Reinhold Elferich; Thomas Dürbaum; Tobias Georg Tolle; Raymond J. Grover; Philip Rutter
Archive | 2004
Thomas Duerbaum; Reinhold Elferich; Tobias Georg Tolle