Tom E. Blomberg

High-k Dielectrics and Metal Gates for Future Generation Memory Devices

The requirements and development of high-k dielectric films for application in storage cells of future generation flash and Dynamic Random Access Memory (DRAM) devices are reviewed. Dielectrics with k-value in the 9-30 range are studied as insulators between charge storage layers and control gates in flash devices. For this application, large band gaps (> 6 eV) and band offsets are required, as well as low trap densities. Materials studied include aluminates and scandates. For DRAM metal-insulator-metal (MIM) capacitors, aggressive scaling of the equivalent oxide thickness (with targets down to 0.3 nm) drives the research towards dielectrics with k-values > 50. Due to the high aspect ratio of MIMCap structures, highly conformal deposition techniques are needed, triggering a substantial effort to develop Atomic Layer Deposition (ALD) processes for the deposition of metal gates and high-k dielectrics. Materials studied include Sr and Ba-based perovskites, with SrTiO3 as one of the most promising candidates, as well as tantalates, titanates and niobates.

Properties of stacked SrTiO3/Al2O3 metal–insulator–metal capacitors

The possibilities to grow thin films of SrTiO3 and Al2O3 by atomic layer deposition for stacked metal–insulator–metal capacitors have been investigated in this work. In order to tune the functional properties of the capacitors, different processing steps have been employed to realize different combinations of the dielectric stacks. Electrical properties, extracted after the postdeposition annealing and sputter deposition of the Au top electrodes, indicated that the metal–insulator–metal (MIM) structures with additional Al2O3 layer provided better leakage currents densities, compared to the ones with single SrTiO3 based MIM capacitors, but the dielectric constant values have also decreased if additional Al2O3 film was inserted. Attempts to optimize the properties of the MIM stacks have been done by manufacturing heterostructures of Al2O3/SrTiO3/Al2O3 as well as SrTiO3/Al2O3/SrTiO3. In the first case, Al2O3 prevented the crystallization of SrTiO3 in the multilayer dielectric structure and therefore reduced ...

Metal-Insulator-Metal capacitors with ALD grown SrTiO3: Influence of Pt electrodes

Metal-Insulator-metal (MIM) capacitors with atomic layer deposited (ALD) single SrTiO3 dielectric have been investigated in this work. Structural and electrical properties were studied after the formation of the MIM stack consisting of the platinum (Pt) bottom electrode, 50 nm SrTiO3 layer and the top Pt electrode. The as deposited films were amorphous and had a dielectric constant of ~ 10, whereas the annealing of the samples in the nitrogen (N2) or oxygen (O2) atmosphere at 550-600 °C led to the crystallization of the SrTiO3 and therefore to the increased dielectric constant of ~ 85. In addition, the electrical results revealed that the combination of SrTiO3 with the high work function electrode like Pt, provided better leakage current performance in comparison with TiN/ SrTiO3 stacks. The values as low as ~ 10−7 A/cm2 at 2 V were observed for both in N2 or O2 annealed SrTiO3 layers. On the other hand, the samples annealed in O2 atmosphere at 600 °C possessed lower capacitance-voltage nonlinearity coefficients (−645 ppm/V2) than the ones for N2 annealed samples (-2700 ppm/V2).

Atomic Layer Deposition: An Enabling Technology for Microelectronic Device Manufacturing

Atomic layer deposition (ALD) recently emerged as an enabling technology for microelectronic device fabrication. This technique provides the unique capability to deposit ultra thin films with the thickness control, uniformity, step coverage, and electrical/mechanical properties required to support device manufacturing at the 45 nm node and beyond. This paper will review the fundamentals of ALD processing and describe the equipment used. Applications of ALD in the fabrication of advanced gate stacks, on-chip capacitors, and thin film magnetic heads are presented.

Studies on the Surface Reactions of Substituted Disilanes with Silica Surface

Both CVD and ALD deposition techniques benefit from a detailed understanding of the reaction mechanisms of the precursor molecules with the surface. In this paper, the reactions of hexakis ethylaminodisilane (AHEAD™), hexamethoxydisilane and hexamethyldisilane were studied on high surface area silica granules at 200-375 °C. Silica was heat treated at 200-820 °C to control the number of surface Si-OH groups. The samples were characterized by FTIR and solid state NMR spectroscopy. After the chemisorption of the precursors with silica, Si-H bonds, not originally present in the molecules, were identified for AHEAD and hexamethoxydisilane, but not for hexamethyldisilane. It is suggested that with AHEAD and hexamethoxydisilane, cleavage of the Si-Si bond takes place during the chemisorption with Si-OH sites. Since no reaction for hexamethyldisilane at the studied temperatures was observed, a prerequisite for the reaction with Si-OH groups seems to be the presence of electronegative O or N atoms in the ligands. In the paper, possible reaction mechanisms with the various surface species are discussed.

The effect of composition on the bandgap width in insulating NbxTayOz nanolayers

The bandgap width in niobium tantalate (NbxTayOz) films with Ta/(Ta+Nb) ratio of 10.7, 41.9, and 68.4 % are studied in this work. The samples were prepared by atomic layer deposition on (100)Si/TaN substrates, some of them subjected to crystallization annealing. Two photoconductivity spectral thresholds are found in all the studied samples: one at around 4.2 eV and another in range 3.2–3.8 eV, which may be correlated with the bandgaps associated with TaOx and NbOx sub-networks, respectively. The observed preservation of the narrowest bandgap of NbOx despite the addition of the Ta cation indicates that electron states of Nb and Ta have insufficient mutual interaction to affect the gap width of two oxide sub-networks.