Tom W. Keller

Energy management for commercial servers

Servers: high-end, multiprocessor systems running commercial workloads, have typically included extensive cooling systems and resided in custom-built rooms for high-power delivery. Recently, as transistor density and demand for computing resources have rapidly increased, even these high-end systems face energy-use constraints. Commercial-server energy management now focuses on conserving power in the memory and microprocessor subsystems. Because their workloads are typically structured as multiple application programs, system-wide approaches are more applicable to multiprocessor environments in commercial servers than techniques that primarily apply to single-application environments, such as those based on compiler optimizations.

Data placement in Bubba

This paper examines the problem of data placement in Bubba, a highly-parallel system for data-intensive applications being developed at MCC. “Highly-parallel” implies that load balancing is a critical performance issue. “Data-intensive” means data is so large that operations should be executed where the data resides. As a result, data placement becomes a critical performance issue.nIn general, determining the optimal placement of data across processing nodes for performance is a difficult problem. We describe our heuristic approach to solving the data placement problem in Bubba. We then present experimental results using a specific workload to provide insight into the problem. Several researchers have argued the benefits of declustering (i e, spreading each base relation over many nodes). We show that as declustering is increased, load balancing continues to improve. However, for transactions involving complex joins, further declustering reduces throughput because of communications, startup and termination overhead.nWe argue that data placement, especially declustering, in a highly-parallel system must be considered early in the design, so that mechanisms can be included for supporting variable declustering, for minimizing the most significant overheads associated with large-scale declustering, and for gathering the required statistics.

The case for power management in web servers

Power management has traditionally focused on portable and handheld devices. This paper breaks with tradition and presents a case for managing power consumption in web servers. Web servers experience large periods of low utilization, presenting an opportunity for using power management to reduce energy consumption with minimal performance impact. We measured the energy consumption of a typical web server under a variety of workloads derived from access logs of real websites, including the 1998 Winter Olympics web site. Our measurements show that the CPU is the largest consumer of power for typical web servers today.We have also created a power simulator for web serving workloads that estimates CPU energy consumption with less than 5.7% error for our workloads. The simulator is fast, processing over 75,000 requests/second on a 866MHz uniprocessor machine. Using the simulator, we quantify the potential benefits of dynamically scaling the processor voltage and frequency, a power management technique that is traditionally found only in handheld devices. We find that dynamic voltage and frequency scaling is highly effective for saving energy with moderately intense web workloads, saving from 23% to 36% of the CPU energy while keeping server responsiveness within reasonable limits.

A performance-conserving approach for reducing peak power consumption in server systems

The combination of increasing component power consumption, a desire for denser systems, and the required performance growth in the face of technology-scaling issues are posing enormous challenges for powering and cooling of server systems. The challenges are directly linked to the peak power consumption of servers.Our solution, Power Shifting, reduces the peak power consumption of servers minimizing the impact on performance. We reduce peak power consumption by using workload-guided dynamic allocation of power among components incorporating real-time performance feedback, activity-related power estimation techniques, and performance-sensitive activity-regulation mechanisms to enforce power budgets.We apply our techniques to a computer system with a single processor and memory. Power shifting adds a system power manager with a dynamic, global view of the systems power consumption to continuously re-budget the available power amongst the two components. Our contributions include:• Demonstration of the greater effectiveness of dynamic power allocation over static budgeting,• Evaluation of different power shifting policies,• Analysis of system and workload factors critical to successful power shifting, and• Proposal of performance-sensitive power budget enforcement mechanisms that ensure system reliability.

A comparison of high-availability media recovery techniques

We compare two high-availability techniques for recovery from media failures in database systems. Both techniques achieve high availability by having two copies of all data and indexes, so that recovery is immediate. “Mirrored declustering” spreads two copies of each relation across two identical sets of disks. “Interleaved declustering” spreads two copies of each relation across one set of disks while keeping both copies of each tuple on separate disks. Both techniques pay the same costs of doubling storage requirements and requiring updates to be applied to both copies.nMirroring offers greater simplicity and universality. Recovery can be implemented at lower levels of the system software (e.g., the disk controller). For architectures that do not share disks globally, it allows global and local cluster indexes to be independent. Also, mirroring does not require data to be declustered (i.e., spread over multiple disks).nInterleaved declustering offers significant improvements in recovery time, mean time to loss of both copies of some data, throughput during normal operation, and response time during recovery. For all architectures, interleaved declustering enables data to be spread over twice as many disks for improved load balancing. We show how tuning for interleaved declustering is simplified because it is dependent only on a few parameters that are usually well known for a specific workload and system configuration.

System power management support in the IBM POWER6 microprocessor

The IBM POWER6™ microprocessor chip supports advanced, dynamic power management solutions for managing not, just the chip but the entire server. The design facilitates a programmable power management solution for greater flexibility and integration into system- and data-center-wide management solutions. The design of the POWER6 microprocessor provides real-time access to detailed and accurate information on power, temperature, and performance. Together, the sensing, actuation, and management support available in the POWER6 processor, known as the EnergyScale™ architecture, enables higher performance, greater energy efficiency, and new power management capabilities such as power and thermal capping and power savings with explicit performance control. This paper provides an overview of the innovative design of the POWER6 processor that enables these advanced, dynamic system power management solutions.

SHIP: Scalable Hierarchical Power Control for Large-Scale Data Centers

In todays data centers, precisely controlling server power consumption is an essential way to avoid system failures caused by power capacity overload or overheating due to increasingly high server density. While various power control strategies have been recently proposed, existing solutions are not scalable to control the power consumption of an entire large-scale data center, because these solutions are designed only for a single server or a rack enclosure. In a modern data center, however, power control needs to be enforced at three levels: rack enclosure, power distribution unit, and the entire data center, due to the physical and contractual power limits at each level. This paper presents SHIP, a highly scalable hierarchical power control architecture for large-scale data centers. SHIP is designed based on well-established control theory for analytical assurance of control accuracy and system stability. Empirical results on a physical testbed show that our control solution can provide precise power control, as well as power differentiations for optimized system performance. In addition, our extensive simulation results based on a real trace file demonstrate the efficacy of our control solution in large-scale data centers composed of thousands of servers.

Scheduling for heterogeneous processors in server systems

Applications on todays high-end systems typically make varying load demands over time. A single application may have many different phases during its lifetime, and workload mixes show interleaved phases. Memory-intensive work or phases may exhibit performance saturation at frequencies below the maximum possible for the processors due to the disparity between processor and memory speeds. Performance saturation is a sign of over-provisioning and leads to energy-inefficient systems. Computers using heterogeneous processors, with the same ISA, but different implementation details, have been proposed as a way of reducing power while avoiding or limiting performance degradation. However, using heterogeneous processors effectively is complicated and requires intelligent schedulingThe research reported here explores the use of a heterogeneous system of processors with identical ISAs and implementation details, but with differing voltages and frequencies. The scheduler uses the execution characteristics of each application to predict its future processing needs and then schedule it to a processor which matches those needs if one is available. The predictions are used to minimize the performance loss to the system as a whole rather than that of a single application. The result limits system power while minimizing total performance loss. A prototype implementation on a Power4 four-processor system is presented. The prototype scheduler is validated using both synthetic and real-world benchmarks. The prototype shows reasonable predictor accuracy and significant power savings for memory-bound applications

TAPO: Thermal-aware power optimization techniques for servers and data centers

A large portion of the power consumption of data centers can be attributed to cooling. In dynamic thermal management mechanisms for data centers and servers, thermal setpoints are typically chosen statically and conservatively, which leaves significant room for improvement in the form of improved energy efficiency. In this paper, we propose two hierarchical thermal-aware power optimization techniques that are complementary to each other and achieve (i) lower overall system power with no performance penalty or (ii) higher performance within the same power budget.

Scheduling processor voltage and frequency in server and cluster systems

Modern server farm and cluster sites consume large quantities of energy both to power and cool the machines in the site. At the same time, less power supply redundancy is offered and power companies and government officials are requesting power consumption be reduced during certain time periods. These trends lead to the requirement of responding to rapid reductions in the maximum power the site may consume. Each possible solution must respond to the new power budget before a cascading failure occurs. Available techniques include powering down some nodes or slowing all nodes in a system uniformly. This work instead examines the feasibility of slowing nodes non-uniformly in response to their performance demands. This approach provides an opportunity to reduce the performance loss caused by a reduction in the power budget. This paper uses the execution characteristics of the work currently running on each processor of the system or cluster to predict the performance of the work at the available frequency settings. The scheduling mechanism selects the lowest frequency for the processor that provides essentially all of the available performance of the work. It ensures that the frequency fits within the available global power budget and, if not, reduces it so that it does. The paper demonstrates the approach using a simple, synthetic benchmark and then validates it using additional, real-world applications.